Addi-Data ADDICOM APCI-7800 Technical Description page 7

APCI-7800
Figures
Fig. 3-1: Correct handling ................................................................ 12
Fig. 4-1: Component scheme of the APCI-7800 (left side) .............. 17
Fig. 4-2: Component scheme of the APCI-7800 (right side) ............ 18
Fig. 5-1: PCI-5V slot (32-bit)............................................................... 19
Fig. 5-2: Inserting the board ............................................................. 20
Fig. 5-3: Fastening the board at the back cover ............................. 20
Fig. 6-1: ADDIREG registration program (example)........................... 22
Fig. 6-2: Board list under ADDIREG.................................................... 24
Fig. 6-3: Communication board ...................................................... 26
Fig. 6-4: FIFO settings with the Device Manager .............................. 29
Fig. 6-5: Setting example with the Device Manager: RS485 ............ 30
Fig. 7-1: 78-pin SUB-D male connector ............................................ 31
Fig. 7-2: Connection cable ST7809 (8 x 9-pin) ................................. 34
Fig. 7-3: Connection cable ST7825 (8 x 25-pin) ............................... 34
Fig. 7-4: RS232 cabling .................................................................... 35
Fig. 7-5: RS422 cabling .................................................................... 35
Fig. 7-6: RS485 cabling .................................................................... 36
Fig. 7-7: Active transmission/active reception .................................. 36
Fig. 7-8: Active transmission/passive reception ................................ 37
Fig. 7-9: Passive transmission/active reception ................................ 37
Fig. 7-10: Passive transmission/passive reception ............................ 37
Fig. 8-1: Connection of the shorting plug for the RS422 mode ........ 38
Fig. 8-2: Connection of the shorting plug for the RS422 mode ........ 38
Fig. 8-3: Connection of the shorting plug for the 20 mA current loop
active transmission/passive reception............................. 39
Fig. 8-4: Connection of the shorting plug for the 20 mA current loop
passive transmission/active reception............................. 39
Fig. 8-5: The MTTTY program ............................................................. 40
Fig. 8-6: Handshake configuration for the board test....................... 41
Fig. 9-1: Inserting the SI module ....................................................... 42
Fig. 9-2: Removing a SI module....................................................... 42
Tables
Table 1-1: Intended purpose depending on the operating mode .... 9
Table 7-1: Pin assignment of port 1 .................................................. 31
Table 7-2: Pin assignment of port 2 .................................................. 31
Table 7-3: Pin assignment of port 3 .................................................. 32
Table 7-4: Pin assignment of port 4 .................................................. 32
Table 7-5: Pin assignment of port 5 .................................................. 32
Table 7-6: Pin assignment of port 6 .................................................. 33
Table 7-7: Pin assignment of port 7 .................................................. 33
Table 7-8: Pin assignment of port 8 .................................................. 33
Figures and Tables
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