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Introduction
This document is aimed at helping users with a quick start of developing application solutions
based on AT32F423 MCU.
Note: The codes in this document are built around ARTERY's V2.x.x BSP. Attention should be paid to the
differences between different versions of BSP when in use.
Applicable products：
Product series
2023.03.20
Getting-started guide for AT32F423
Getting-started guide for AT32F423
AT32F423xx
1
AN0165
Application Note
Ver 2.0.0
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Related Manuals for ARTERY AT32F423 Series
Summary of Contents for ARTERY AT32F423 Series
- Page 1 This document is aimed at helping users with a quick start of developing application solutions based on AT32F423 MCU. Note: The codes in this document are built around ARTERY’s V2.x.x BSP. Attention should be paid to the differences between different versions of BSP when in use.
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Page 2: Table Of Contents
Getting-started guide for AT32F423 Contents Development resources ..................5 Set up AT32 development environment ..............5 Debug tools and evaluation board ................5 Programming tools and software resources ..............6 AT32 development environment .................. 6 How to quickly replace AT32F415 with AT32F423 ............. 12 AT32F423 functionality enhancement.............. - Page 3 Getting-started guide for AT32F423 List of tables Table 1. Document revision history ....................25 2023.03.20 Ver 2.0.0...
- Page 4 List of figures Figure 1. AT-START-F423 and AT-Link-EZ ..................5 Figure 2. AT-START-F423 evaluation board package from ARTERY official website ......5 Figure 3. ICP/ISP/AT-Link-Family package from ARTERY official website ......... 6 Figure 4. BSP resources from ARTERY official website ..............6 Figure 5.
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Page 5: Development Resources
Note: For details on AT-START-AT32F423 evaluation board, refer to the “UM_AT_START_F423_Vx.x” that is available from ARTERY’s official website. You can go to ARTERY official website → PRODUCT → Value line → AT32F423 series → Resources → Evaluation board, where you can download a ZIP-format AT-START- F423 and get AT_START_F423_Vx.x\03_Documents. -
Page 6: Programming Tools And Software Resources
Template project The frequently-used IDE template projects are included in ARTERY’s firmware BSP. You can get these resources by visiting ARTERY official website → Product → Value line → AT32F423 series → BSP. Figure 4. BSP resources from ARTERY official website BPS offers such template projects as at32_ide/eclipse_gcc/Keil_v5/Keil_v4/IAR_6.10/IAR_7.4/... -
Page 7: Figure 5. Keil_V5 Template
These example codes are stored at AT32F423_Firmware_Library_V2.x.x \ project \at_start_f4xx \examples. Note: For details on BSP, refer to Section 4 of the document “AT32F423_firmware_BSP&Pack_user_guide”. This guideline is available from ARTERY official website → Product → Value line → AT32F423 series → BSP. 2023.03.20 Ver 2.0.0... -
Page 8: Figure 6. Pack Resources From Artery Official Website
Pack installation The installation of Pack is required to add AT32 MCU part number in Keil/IAR. This Pack can be downloaded from ARTERY official website → Product → Value line → AT32F423 series → Pack. Figure 6. Pack resources from ARTERY official website Regarding the Keil compiling system, the keil 4.74 or above V5.23 is recommended. -
Page 9: Figure 9. Click "Pack Installer" Icon In Keil
Note: For details on Pack, refer to Section 2 of the document “AT32F423_firmware_BSP&Pack_user_guide”. This guideline is available from ARTERY official website → Product → Value line → AT32F423 series → BSP, and download BSP zip file and view the AT32F423_Firmware_Library_Vx.x.x\document into it. -
Page 10: Figure 11. Keil Debug Option
Choose “AT-Link(WinUSB)-CMSIS-DAP/AT-Link-CMSIS-DAP” Note: For more information on WinUSB, refer to “FAQ0136_How_to_use_AT-LINK_WinUSB_EN_V2.0.0”. This FAQ is stored at ARTERY official website → Support → FAQ → FAQ0136. In “Port” option, choose “SW”, and then check “SWJ” option As shown in step 3 below, the ARM SW-DP debug module is already recognized. -
Page 11: Figure 14. Iar Debug Option
Figure 15. IAR CMSIS-DAP option Note: The document AT32F423_firmware_BSP&Pack_user_guide provides details on Flash algorithm, MCU product series replacement and J-Link. Thus they are not repeated hereof. This document is located at ARTERY official website → Product → Value line → AT32F423 series → BSP. -
Page 12: How To Quickly Replace At32F415 With At32F423
This migration guide from AT32F415 to AT32F423 is detailed in the document “MG0023_Migrating_from_AT32F415_to_AT32F423_V2.0.0”, which is stored at ARTERY official website → Product → Value line → AT32F423 series page If program failure occurs, please refer to the corresponding sections of this document, or you can contact your local or nearest ARTERY Tech team for assistance. -
Page 13: Pll Clock Settings
→ AT32F423 series → Tool. PLL automatic frequency switch feature When the PLL multiplication frequency of AT32F423 series is greater than 108MHz, it is recommended to enable PLL auto step-by-step frequency switch feature. Figure 19 gives an example of PLL auto frequency switching function in AT32F423 BSP. -
Page 14: Encryption
In other words, enabling and disabling must be operated in pair. Encryption Note: The BOOT1 bit of AT32F423 series is located in the user system data area (0x1FFF F800). When ISP tool is used, it is mandatory to ensure that nBOOT1=1 is asserted (default value) so that the program is booted from system memory instead of SRAM. -
Page 15: Figure 21. Use Isp To Enable Access Protection
Getting-started guide for AT32F423 Figure 21. Use ISP to enable access protection Figure 22. Use ISP to unlock access protection Note: Access protection, after enabled, cannot be unlocked through erase operation. 2023.03.20 Ver 2.0.0... -
Page 16: Figure 23. Use Icp Tool To Enable Erase/Write Protection
“Yes” Disable erase/write protection: check “Protection” option, choose “Disable” and “Erase/ write protection”, and then click “Yes” Artery ISP Multi-Port Programmer tool (BOOT0=1) Enable erase/write protection: check “Protection” option, choose “Enable” and “Erase/write protection”, and then click “Yes”... -
Page 17: Set System Memory As Main Memory Extension
System memory is used as a boot mode by default to store microcontroller manufacturer’ Startup Code. On top of this, in AT32F423 series, a new feature is added to the system memory by using it to store user-defined codes as an extended memory area (AP mode). -
Page 18: Figure 25. Use Icp Tool To Set Boot Memory Ap Mode
“File info” column. Figure 26. Boot memory AP mode operating progress During mass-production stage, we can also use Artery ICP Programmer to enable system memory as memory extension area according to the following procedures: ... -
Page 19: Figure 27. Use Icp Tool To Set Offline Boot Mode Ap Mode
Getting-started guide for AT32F423 Go to menu bar: AT-Link setting -- AT-Link offline configuration setting Follow the steps below to generate off-line project Click “Create” Enter a project name Select a particular MCU series and MCU part number Add.hex files Choose SWD as download interface Check “Boot mode AP mode”... -
Page 20: Figure 28. Use Icp Tool To Set Offline Project Programming
For DEMO on running user program in the system memory, please refer to BSP, which is stored at ARTERY official website → Product → Value line → AT32F423 series → BSP. After unzipping BSP file, you can get demo under AT32F423_Firmware_Library_V2.x.x\utilities\at32F423_boot_memory_ap_demo. -
Page 21: How To Distinguish At32 Mcu From Other Mcus
Getting-started guide for AT32F423 How to distinguish AT32 MCU from other MCUs Reading Cortex-M series CPU ID number, you can determine whether it is based on M0, M0+,M1,M3 or M4 core. Figure 30. Read Cortex ID cortex_id = *(uint32_t *)0xE000ED00;// read Cortex part number if((cortex_id == 0x410FC240) || (cortex_id == 0x410FC241)) printf("This chip is Cortex-M4F.\r\n");... -
Page 22: Frequently-Asked Questions For Download And Compiling
MCU series is being used. For more information, please refer to the “Debug” section of the corresponding reference manual and AN0016_Recognize_AT32_MCU. This AN0016 can be downloaded or read from ARTERY official website → Support → AP note → AN0016. Frequently-asked questions for download and... -
Page 23: No Debug Unit Device Found
Getting-started guide for AT32F423 No Debug Unit Device found Download interface is being occupied, for instance, ICP is being connected to a target device. JTAG/SWD connection error or it is not connected. RDDI-DAP Error Compiler offers a higher level of optimization, for instance, the optimization level for keil ... -
Page 24: Slib (Security Library)
MCU applications. In response to this demand, AT32F423 series is equipped with a security library, known as sLib, with the aim of preventing important IP codes from being altered or read by end user program, so as to safeguard the rights of solution providers. -
Page 25: Revision History
Getting-started guide for AT32F423 Revision history Table 1. Document revision history Date Revision Changes 2023.03.20 2.0.0 Initial release 2023.03.20 Ver 2.0.0... - Page 26 No license, express or implied, to any intellectual property rights is granted under this document. If any part of this document deals with any third party products or services, it shall not be deemed a license grant by ARTERY for the use of such third party products or services, or any intellectual property contained therein, or considered as a warranty regarding the use in any manner whatsoever of such third party products or services or any intellectual property contained therein.
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