NXP Semiconductors ARM Cortex M0+ User Manual
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NXP Semiconductors ARM Cortex M0+ User Manual

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NXP Semiconductors
Document identifier: CM0GMCLIBUG
User Guide
Rev. 5, 01 November 2021
GMCLIB User's Guide
®
®
ARM
Cortex
M0+

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  • Page 1 NXP Semiconductors Document identifier: CM0GMCLIBUG User Guide Rev. 5, 01 November 2021 GMCLIB User's Guide ® ® Cortex...

  • Page 2: Table Of Contents

    NXP Semiconductors Contents Chapter 1 Library....................5 1.1 Introduction..........................5 1.1.1 Overview............................. 5 1.1.2 Data types........................... 5 1.1.3 API definition..........................5 1.1.4 Supported compilers........................6 1.1.5 Library configuration........................6 1.1.6 Special issues..........................6 1.2 Library integration into project (MCUXpresso IDE) ..............6 1.3 Library integration into project (Keil µVision) ................
  • Page 3 NXP Semiconductors Contents 2.9.2 GMCLIB_ADC_CONFIG_T_F16 type description..............46 2.9.3 GMCLIB_PWM_CONFIG_T_F16 type description..............46 2.9.4 GMCLIB_PHASE_INDEX_T type description................47 2.9.5 Declaration..........................47 2.9.6 Function use..........................47 2.10 GMCLIB_SvmStd........................48 2.10.1 Available versions........................59 2.10.2 Declaration..........................59 2.10.3 Function use..........................60 2.11 GMCLIB_SvmIct........................60 2.11.1 Available versions........................62 2.11.2 Declaration..........................
  • Page 4 NXP Semiconductors Contents A.22 GMCLIB_2COOR_DQ_T_FLT....................87 A.23 GMCLIB_2COOR_SINCOS_T_F16..................87 A.24 GMCLIB_2COOR_SINCOS_T_FLT..................88 A.25 FALSE...........................88 A.26 TRUE............................ 89 A.27 FRAC8..........................89 A.28 FRAC16..........................89 A.29 FRAC32..........................90 A.30 ACC16...........................90 A.31 ACC32...........................90 GMCLIB User's Guide, Rev. 5, 01 November 2021 User Guide...

  • Page 5: Chapter 1 Library

    NXP Semiconductors Chapter 1 Library 1.1 Introduction 1.1.1 Overview This user's guide describes the General Motor Control Library (GMCLIB) for the family of ARM Cortex M0+ core-based microcontrollers. This library contains optimized functions. 1.1.2 Data types GMCLIB supports several data types: (un)signed integer, fractional , and accumulator. The integer data types are useful for general-purpose computation;...

  • Page 6: Supported Compilers

    NXP Semiconductors Library Table 1. Input/output types Type Output Input frac16_t frac32_t acc32_t 1.1.4 Supported compilers GMCLIB for the ARM Cortex M0+ core is written in C language or assembly language with C-callable interface depending on the specific function. The library is built and tested using the following compilers: •...
  • Page 7 NXP Semiconductors Library Adding RTCESL component to project The MCUXpresso SDK package is necessary to add any example or new project and RTCESL component. In case the package has not been downloaded go to mcuxpresso.nxp.com, build the final MCUXpresso SDK package for required board and download it.
  • Page 8 NXP Semiconductors Library Figure 2. MCUXpresso IDE - create new project or Import SDK example(s) Then select your board, and clik Next button. Figure 3. MCUXpresso IDE - selecting the board Find the Middleware tab in the Components part of the window and click on the checkbox to be the rtcesl component ticked. Last step is to click the Finish button and wait for project creating with all RTCESL libraries and include paths.

  • Page 9: Library Integration Into Project (Keil Μvision)

    NXP Semiconductors Library Figure 4. MCUXpresso IDE - selecting rtcesl component Type the #include syntax into the code where you want to call the library functions. In the left-hand dialog, open the required .c file. After the file opens, include the following lines into the #include section: #include "mlib.h"...
  • Page 10 NXP Semiconductors Library 6. Look for a node called "Keil::Kinetis_KVxx_DFP." If there are the Install or Update options, click the button to install/ update the package. See Figure 7. When installed, the button has the "Up to date" title. Now close the Pack Installer.
  • Page 11 NXP Semiconductors Library Figure 7. Select Device dialog 8. In the next dialog, expand the Device node, and tick the box next to the Startup node. See Figure 9. Expand the CMSIS node, and tick the box next to the CORE node.
  • Page 12 NXP Semiconductors Library Figure 9. Project Memory-mapped divide and square root support Some Kinetis platforms contain a peripheral module dedicated for division and square root. This section shows how to turn the memory-mapped divide and square root (MMDVSQ) support on and off.
  • Page 13 NXP Semiconductors Library Figure 10. Preprocessor symbols 4. Click OK in the main dialog. See the device reference manual to verify whether the device contains the MMDVSQ module. Linking the files into the project GMCLIB requires MLIB and GFLIB to be included too. The following steps show how to include all dependent modules.
  • Page 14 NXP Semiconductors Library Figure 11. Adding .h files dialog mlib.lib file. If the file does 5. Navigate to the parent folder C:\NXP\RTCESL\CM0_RTCESL_4.7_KEIL\MLIB, and select the not appear, set the Files of type filter to Library file. Click Add. See Figure Figure 12.
  • Page 15 NXP Semiconductors Library gmclib.lib file. If the file 9. Navigate to the parent folder C:\NXP\RTCESL\CM0_RTCESL_4.7_KEIL\GMCLIB, and select the does not appear, set the Files of type filter to Library file. Click Add. 10. Now, all necessary files are in the project tree; see Figure 13.
  • Page 16 NXP Semiconductors Library Figure 14. Library path addition Type the #include syntax into the code. Include the library into a source file. In the new project, it is necessary to create a source file: 1. Right-click the Source Group 1 node, and Add New Item to Group 'Source Group 1'… from the menu.

  • Page 17: Library Integration Into Project (Iar Embedded Workbench)

    NXP Semiconductors Library 4. In the opened source file, include the following lines into the #include section, and create a main function: #include "mlib.h" #include "gflib.h" #include "gmclib.h" int main(void) while(1); When you click the Build (F7) icon, the project will be compiled without errors.
  • Page 18 NXP Semiconductors Library Figure 17. New project 5. In the main menu, go to Project > Options…, and a dialog appears. 6. In the Target tab, select the Device option, and click the button next to the dialog to select the MCU. In this example, select NXP >...
  • Page 19 NXP Semiconductors Library 3. In the right-hand part of the dialog, click the Preprocessor tab (it can be hidden in the right; use the arrow icons for navigation). 4. In the text box (at the Defined symbols: (one per line)), type the following (See...
  • Page 20 NXP Semiconductors Library Figure 20. New Group 3. Click on the newly created group, and click the Add Variable button. A dialog appears. 4. Type this name: RTCESL_LOC 5. To set up the value, look for the library by clicking the '…' button, or just type the installation path into the box: C:\NXP\RTCESL\CM0_RTCESL_4.7_IAR.
  • Page 21 NXP Semiconductors Library mlib.h 5. Navigate into the library installation folder C:\NXP\RTCESL\CM0_RTCESL_4.7_IAR\MLIB\Include, and select the file. (If the file does not appear, set the file-type filter to Source Files.) Click Open. See Figure 6. Navigate into the library installation folder C:\NXP\RTCESL\CM0_RTCESL_4.7_IAR\MLIB, and select the mlib.a file.
  • Page 22 NXP Semiconductors Library 2. In the left-hand column, select C/C++ Compiler. 3. In the right-hand part of the dialog, click on the Preprocessor tab (it can be hidden in the right; use the arrow icons for navigation). 4. In the text box (at the Additional include directories title), type the following folder (using the created variable): •...

  • Page 23: Chapter 2 Algorithms In Detail

    NXP Semiconductors Chapter 2 Algorithms in detail 2.1 GMCLIB_Clark GMCLIB_Clark function calculates the Clarke transformation, which is used to transform values (flux, voltage, current) from the three-phase coordinate system to the two-phase (α-β) orthogonal coordinate system, according to the following equations: 2.1.1 Available versions...

  • Page 24: Gmclib_Clarkinv

    NXP Semiconductors Algorithms in detail /* Periodical function or interrupt */ void Isr(void) /* Clarke Transformation calculation */ GMCLIB_Clark_F16(&sAbc, &sAlphaBeta); 2.2 GMCLIB_ClarkInv GMCLIB_ClarkInv function calculates the Clarke transformation, which is used to transform values (flux, voltage, current) from the two-phase (α-β) orthogonal coordinate system to the three-phase coordinate system, according to the following equations: 2.2.1 Available versions...

  • Page 25: Gmclib_Park

    NXP Semiconductors Algorithms in detail void Isr(void); void main(void) /* Alpha, Beta structure initialization */ sAlphaBeta.f16Alpha = FRAC16(0.0); sAlphaBeta.f16Beta = FRAC16(0.0); /* Periodical function or interrupt */ void Isr(void) /* Inverse Clarke Transformation calculation */ GMCLIB_ClarkInv_F16(&sAlphaBeta, &sAbc); 2.3 GMCLIB_Park GMCLIB_Park function calculates the Park transformation, which transforms values (flux, voltage, current) from the stationary two-phase (α-β) orthogonal coordinate system to the rotating two-phase (d-q) orthogonal coordinate system, according to the...

  • Page 26: Function Use

    NXP Semiconductors Algorithms in detail 2.3.3 Function use The use of the GMCLIB_Park function is shown in the following examples: Fixed-point version: #include "gmclib.h" static GMCLIB_2COOR_ALBE_T_F16 sAlphaBeta; static GMCLIB_2COOR_DQ_T_F16 sDQ; static GMCLIB_2COOR_SINCOS_T_F16 sAngle; void Isr(void); void main(void) /* Alpha, Beta structure initialization */ sAlphaBeta.f16Alpha = FRAC16(0.0);...

  • Page 27: Declaration

    NXP Semiconductors Algorithms in detail The available versions of the GMCLIB_ParkInv function are shown in the following table: Table 5. Function versions Function name Input type Output type Result type GMCLIB_ParkInv_F16 GMCLIB_2COOR_DQ_T_F16 GMCLIB_2COOR_ALBE_T_F16 void GMCLIB_2COOR_SINCOS_T_F16 Inverse Park transformation of a 16-bit fractional two-phase rotating system input to a 16-bit fractional two-phase stationary system, using a 16-bit fractional angle two-component (sin / cos) position information.

  • Page 28: Gmclib_Decouplingpmsm

    NXP Semiconductors Algorithms in detail 2.5 GMCLIB_DecouplingPMSM GMCLIB_DecouplingPMSM function calculates the cross-coupling voltages to eliminate the d-q axis coupling that causes nonlinearity of the control. The d-q model of the motor contains cross-coupling voltage that causes nonlinearity of the control.

  • Page 29: Available Versions

    NXP Semiconductors Algorithms in detail • u are the d and q decoupled voltages; outputs from the algorithm ddec qdec The fractional representation of the d-component equation is as follows: The fractional representation of the q-component equation is as follows: where: •...

  • Page 30: Gmclib_Decouplingpmsm_T_A32 Type Description

    NXP Semiconductors Algorithms in detail Table 6. Function versions Function name Input/output type Result type GMCLIB_DecouplingPMSM_F16 Input GMCLIB_2COOR_DQ_T_F16 void GMCLIB_2COOR_DQ_T_F16 frac16_t Parameters GMCLIB_DECOUPLINGPMSM_T_A32 Output GMCLIB_2COOR_DQ_T_F16 The PMSM decoupling with a 16-bit fractional d-q voltage, current inputs, and a 16-bit fractional electrical speed input. The parameters are 32-bit accumulator types. The output is a 16-bit fractional decoupled d-q voltage.

  • Page 31: Gmclib_Dtcomplut1D

    NXP Semiconductors Algorithms in detail /* Voltage D, Q structure initialization */ sVoltageDQ.f16D = FRAC16(0.0); sVoltageDQ.f16Q = FRAC16(0.0); /* Current D, Q structure initialization */ sCurrentDQ.f16D = FRAC16(0.0); sCurrentDQ.f16Q = FRAC16(0.0); /* Speed initialization */ f16AngularSpeed = FRAC16(0.0); /* Motor parameters for decoupling Kd = 40, Kq = 20 sDecouplingParam.a32KdGain = ACC32(40.0);...
  • Page 32 NXP Semiconductors Algorithms in detail Figure 28. Inverter error characteristic example - voltage error dependency on phase current The inverter error characteristic is assigned to the GMCLIB_DTCompLut1D algorithm as the LUT, which simply adds the error-voltage vector to the input-voltage vector. The data for the LUT should be measured from a real inverter for the best compensation result.

  • Page 33: Available Versions

    NXP Semiconductors Algorithms in detail where: • u , and u are the error-voltage components of the error-voltage vector. Aerror Berror Cerror • i , and i are the current components of the measured-current vector. • The LUT contains the inverter measured characteristic. See GMCLIB_DTCOMPLUT1D_T_F16 for details.

  • Page 34: Gmclib_Dtcomplut1D_T_F16 Type Description

    NXP Semiconductors Algorithms in detail Table 7. Function versions Function name Input/output type Result type The parameter structure consists of two members of the GMCLIB_DTCOMPLUT1D_T_F16 structure type. The first parameter is the pointer to the LUT and the second parameter is the size of the LUT.

  • Page 35: Gmclib_Elimdcbusripfoc

    NXP Semiconductors Algorithms in detail f16UDCBus = FRAC16(0.9); /* DC Bus voltage initialization */ sParam.pf16Table = f16Table; sParam.u16TableSize = 3; /* Periodical function or interrupt */ void Isr(void) /* Dead-Time compensation calculation */ GMCLIB_DTCompLut1D_F16(&sIABC, &sUAlBe, f16UDCBus, &sParam, &sUAlBeComp); 2.7 GMCLIB_ElimDcBusRipFOC...
  • Page 36 NXP Semiconductors Algorithms in detail If the fractional arithmetic is used, the FOC and DC-bus voltages have their scales, which take place in GMCLIB_ElimDcBusRipFOC_Eq1; the equation is as follows: where: • U is the scaled FOC voltage • U is the scaled measured DC-bus voltage dcbus •...

  • Page 37: Available Versions

    NXP Semiconductors Algorithms in detail Figure 32. Results of the DC-bus voltage ripple elimination 2.7.1 Available versions This function is available in the following versions: • Fractional output - the output is the fractional portion of the result; the result is within the range <-1 ; 1). The result may saturate.

  • Page 38: Declaration

    NXP Semiconductors Algorithms in detail 2.7.2 Declaration The available GMCLIB_ElimDcBusRipFOC functions have the following declarations: void GMCLIB_ElimDcBusRipFOC_F16(frac16_t f16UDCBus, const GMCLIB_2COOR_ALBE_T_F16 *psUAlBe, GMCLIB_2COOR_ALBE_T_F16 *psUAlBeComp) 2.7.3 Function use The use of the GMCLIB_ElimDcBusRipFOC function is shown in the following example: #include "gmclib.h"...
  • Page 39 NXP Semiconductors Algorithms in detail • i is the space vector modulation index Using the previous equations, the GMCLIB_ElimDcBusRip function compensates an amplitude of the direct-α and the quadrature- β component of the stator-reference voltage vector, using the formula shown in the following equations: where: •...
  • Page 40 NXP Semiconductors Algorithms in detail where: • U * is the direct-α duty cycle ratio α • U * is the quadrature-β duty cycle ratio β • U is the direct-α voltage α • U is the quadrature-β voltage β...

  • Page 41: Available Versions

    NXP Semiconductors Algorithms in detail 2.8.1 Available versions This function is available in the following versions: • Fractional output - the output is the fractional portion of the result; the result is within the range <-1 ; 1). The result may saturate.

  • Page 42: Gmclib_Svmstdshifted

    NXP Semiconductors Algorithms in detail /* Voltage Alpha, Beta structure initialization */ sUAlBe.f16Alpha = FRAC16(0.0); sUAlBe.f16Beta = FRAC16(0.0); /* SVM modulation index */ a32IdxMod = ACC32(1.3); /* DC bus voltage initialization */ f16UDcBus = FRAC16(0.8); /* Periodical function or interrupt */...
  • Page 43 NXP Semiconductors Algorithms in detail Figure 34. Single-shunt current reconstruction principle by GMCLIB_SvmStdShifted Two different phase-current samples cannot be taken when: • The voltage vector is crossing the SVM sector border. Only one sample can be taken. • The modulation index is low. The sampling intervals are too short and no current samples can be taken.
  • Page 44 NXP Semiconductors Algorithms in detail Figure 35. Problematic current reconstruction cases A different shifting strategy is applied for both critical cases: 1. Passing active vector: • Freezes the center edge. • Moves one critical edge. • It is used for higher modulation indexes.

  • Page 45: Available Versions

    NXP Semiconductors Algorithms in detail Figure 36. PWM shifting principle for passing active vector and low modulation indexes cases 2.9.1 Available versions This function is available in the following versions: • Fractional output - the duty-cycle outputs are the fractional portion of the result. The result is within the range of <0 ; 1). The result may saturate.

  • Page 46: Gmclib_Svmstdshifted_T_F16 Type Description

    NXP Semiconductors Algorithms in detail 2.9.1.1 GMCLIB_SVMSTDSHIFTED_T_F16 type description The input to configure the structure for the GMCLIB_SvmStdShifted function. Variable name Input type Description f16LowerLim frac16_t Low PWM duty-cycle limit. It influences any duty-cycle output in the sDuty structure of the PWM configuration structure.

  • Page 47: Gmclib_Phase_Index_T Type Description

    NXP Semiconductors Algorithms in detail Variable name Input type Description sDuty f16A frac16_t The phase-A duty cycle is a 16-bit fractional value within the range of <0 ; 1). It is calculated by the algorithms and targeted to configure the PWM module.

  • Page 48: Gmclib_Svmstd

    NXP Semiconductors Algorithms in detail void main(void) /* Alpha, Beta voltage inputs */ sAlphaBetaIn.f16Alpha = FRAC16(0.25); sAlphaBetaIn.f16Beta = FRAC16(0.1) /* Set SvmStdShifted parameter */ sParam.f16LowerLim = FRAC16(0.01); sParam.f16UpperLim = FRAC16(0.9); sParam.f16MinT1T2 = FRAC16(0.1); /* Periodical function or interrupt */ void Isr(void)
  • Page 49 NXP Semiconductors Algorithms in detail The top and bottom switches are working in a complementary mode; for example, if the top switch S is on, then the corresponding bottom switch S is off, and vice versa. Considering that the value 1 is assigned to the ON state of the top switch, and value 0 is assigned to the ON state of the bottom switch, the switching vector [a, b, c] can be defined.
  • Page 50 NXP Semiconductors Algorithms in detail Table 12. Switching patterns and space vectors (continued) Vector α β /√3 DCBus DCBus /√3 DCBus DCBus DCBus /√3 DCBus DCBus /√3 DCBus DCBus Figure 2 depicts the basic feasible switching states (vectors). There are six nonzero vectors - U...
  • Page 51 NXP Semiconductors Algorithms in detail Figure 39. Projection of reference voltage vector in the respective sector The stator reference voltage vector U is phase-advanced by 30° from the direct-α, and thus can be generated with an appropriate combination of the adjacent basic switching states U and U .
  • Page 52 NXP Semiconductors Algorithms in detail Figure 40. Detail of the voltage vector projection in the respective sector In this case, the reference stator voltage vector U is located in sector I, and can be generated using the appropriate duty-cycle ratios of the basic switching states U and U .
  • Page 53 NXP Semiconductors Algorithms in detail Sector II is depicted in GMCLIB_SvmStd_Img5. In this particular case, the reference stator voltage vector U is generated using the appropriate duty-cycle ratios of the basic switching states T and T . The basic equations describing this sector are...
  • Page 54 NXP Semiconductors Algorithms in detail Figure 42. Detail of the voltage vector projection in the respective sector The equations describing those auxiliary time-duration components are as follows: Equations in GMCLIB_SvmStd_Eq8 have been created using the sine rule. The resultant duty-cycle ratios T...
  • Page 55 NXP Semiconductors Algorithms in detail To depict the duty-cycle ratios of the basic space vectors for all sectors, we define: • Three auxiliary variables: • Two expressions - t_1 and t_2, which generally represent the duty-cycle ratios of the basic space vectors in the respective...
  • Page 56 NXP Semiconductors Algorithms in detail Figure 43. Direct-u and quadrature-u components of the stator reference voltage GMCLIB_SvmStd_Img7 depicts the direct-u and quadrature-u components of the stator reference voltage vector U , which were α β calculated using equations u = cos ϑ and u = sin ϑ, respectively.
  • Page 57 NXP Semiconductors Algorithms in detail Figure 45. Identification of the sector number In the worst case, at least three simple comparisons are required to precisely identify the sector of the stator reference voltage vector. For example, if the stator reference voltage vector is located as shown in GMCLIB_SvmStd_Img3, the stator-reference voltage vector is phase-advanced by 30°...
  • Page 58 NXP Semiconductors Algorithms in detail Figure 46. Standard space vector modulation technique — center-aligned PWM GMCLIB_SvmStd_Img11 shows the waveforms of the duty-cycle ratios, calculated using standard space vector modulation. For the accurate calculation of the duty-cycle ratios, direct-α, and quadrature-β components of the stator reference voltage vector, it must be considered that the duty cycle cannot be higher than one (100 %);...

  • Page 59: Available Versions

    NXP Semiconductors Algorithms in detail Figure 47. Standard space vector modulation technique 2.10.1 Available versions This function is available in the following versions: • Fractional output - the output is the fractional portion of the result; the result is within the range <0 ; 1). The result may saturate.

  • Page 60: Function Use

    NXP Semiconductors Algorithms in detail 2.10.3 Function use The use of the GMCLIB_SvmStd function is shown in the following example: #include "gmclib.h" static uint16_t u16Sector; static GMCLIB_2COOR_ALBE_T_F16 sAlphaBeta; static GMCLIB_3COOR_T_F16 sAbc; void Isr(void); void main(void) /* Alpha, Beta structure initialization */ sAlphaBeta.f16Alpha = FRAC16(0.0);...
  • Page 61 NXP Semiconductors Algorithms in detail The sector numbers determined by this formula must be further transformed to correspond to those determined by the sector identification tree. The transformation which meets this requirement is shown in the following table: Table 16. Transformation of the sectors...

  • Page 62: Available Versions

    NXP Semiconductors Algorithms in detail For an accurate calculation of the duty-cycle ratios and the direct-α and quadrature-β components of the stator reference voltage vector, the duty cycle cannot be higher than one (100 %); in other words, the assumption must be met.

  • Page 63: Gmclib_Svmu0N

    NXP Semiconductors Algorithms in detail 2.12 GMCLIB_SvmU0n The GMCLIB_SvmU0nfunction calculates the appropriate duty-cycle ratios, which are needed for generation of the given stator-reference voltage vector using the general sinusoidal modulation technique. GMCLIB_SvmU0n function for calculating of duty-cycle ratios is widely used in modern electric drives. This function calculates...

  • Page 64: Available Versions

    NXP Semiconductors Algorithms in detail Figure GMCLIB_SvmU0n_Img1 shows calculated waveforms of the duty cycle ratios using space vector modulation with nulls. For an accurate calculation of the duty-cycle ratios, direct-α, and quadrature-β components of the stator reference voltage vector, consider that the duty cycle cannot be higher than one (100 %); in other words, the assumption must be met.

  • Page 65: Declaration

    NXP Semiconductors Algorithms in detail Table 18. Function versions Function name Input type Output type Result type SVM sector. The input is within the range <-1 ; 1); the output duty cycle is within the range <0 ; 1). The output sector is an integer value within the range <1 ; 6>.
  • Page 66 NXP Semiconductors Algorithms in detail where T is the switching period, and t_1 and t_2 are the duty-cycle ratios of the basic space vectors defined for the respective sector in Table 2-7. The generally-used center-aligned PWM is discussed briefly in the following sections. Generating the center-aligned PWM pattern is accomplished by comparing threshold levels pwm_a, pwm_b, and pwm_c with the free-running up/down counter.

  • Page 67: Available Versions

    NXP Semiconductors Algorithms in detail Figure 52. Space vector modulation technique with O nulls 2.13.1 Available versions This function is available in the following versions: • Fractional output - the output is the fractional portion of the result; the result is within the range <0 ; 1). The result may saturate.

  • Page 68: Function Use

    NXP Semiconductors Algorithms in detail 2.13.3 Function use The use of the GMCLIB_SvmU7n function is shown in the following example: #include "gmclib.h" static uint16_t u16Sector; static GMCLIB_2COOR_ALBE_T_F16 sAlphaBeta; static GMCLIB_3COOR_T_F16 sAbc; void Isr(void); void main(void) /* Alpha, Beta structure initialization */ sAlphaBeta.f16Alpha = FRAC16(0.0);...

  • Page 69: Available Versions

    NXP Semiconductors Algorithms in detail Figure 53. Identification of the sector number The knowledge of the sector is necessary for the current sensing especially when shunt resistors are used. The GMCLIB_SvmDpwmfunction does not require the sector directly, but it requires the portion identification explained in the following.

  • Page 70: Declaration

    NXP Semiconductors Algorithms in detail Table 21. Function versions Function name Input type Output type Result type GMCLIB_SvmDpwm_F1 GMCLIB_2COOR_ALBE_T_F16 GMCLIB_3COOR_T_F16 uint16_t Standard discontinuous PWM with a 16-bit fractional stationary (α-β) input, and a 16-bit fractional 3-phase output. The result type is a 16-bit unsigned integer, which indicates the actual SVM sector.
  • Page 71 NXP Semiconductors Algorithms in detail Finding the sector in which the reference stator voltage vector U resides is similar to GMCLIB_SvmStd. This is achieved by converting the direct-α and quadrature-β components of the reference stator voltage vector U into the balanced 3-phase...

  • Page 72: Available Versions

    NXP Semiconductors Algorithms in detail Table 22. Duty cycle calculation from portions (continued) pwm_b 1 - u 0 + u 0 - u 1 + u = 1 + u ref2 ref1 β ref2 ref1 β pwm_c 1 + u...
  • Page 73 NXP Semiconductors Algorithms in detail /* Periodical function or interrupt */ void Isr(void) /* Extended Discountinues PWM calculation */ u16Sector = GMCLIB_SvmExDpwm_F16(&sAlphaBeta, &sAngle, &sAbc); GMCLIB User's Guide, Rev. 5, 01 November 2021 User Guide 73 / 92...

  • Page 74: Appendix A Library Types

    NXP Semiconductors Appendix A Library types A.1 bool_t bool_t type is a logical 16-bit type. It is able to store the boolean variables with two states: TRUE (1) or FALSE (0). Its definition is as follows: typedef unsigned short bool_t;...

  • Page 75: Uint16_T

    NXP Semiconductors Library types Table 25. Data storage (continued) A.3 uint16_t uint16_t type is an unsigned 16-bit integer type. It is able to store the variables within the range <0 ; 65535>. Its definition is as follows: typedef unsigned short uint16_t;...

  • Page 76: Uint32_T

    NXP Semiconductors Library types A.4 uint32_t uint32_t type is an unsigned 32-bit integer type. It is able to store the variables within the range <0 ; 4294967295>. Its definition is as follows: typedef unsigned long uint32_t; The following figure shows the way in which the data is stored by this type: Table 27.

  • Page 77: Int16_T

    NXP Semiconductors Library types Table 28. Data storage (continued) A.6 int16_t int16_t type is a signed 16-bit integer type. It is able to store the variables within the range <-32768 ; 32767>. Its definition is as follows: typedef short int16_t;...

  • Page 78: Frac8_T

    NXP Semiconductors Library types Table 30. Data storage (continued) 24 23 16 15 Value Integer 2147483647 -2147483648 55977296 -843915468 A.8 frac8_t frac8_t type is a signed 8-bit fractional type. It is able to store the variables within the range <-1 ; 1). Its definition is as follows: typedef char frac8_t;...

  • Page 79: Frac16_T

    NXP Semiconductors Library types A.9 frac16_t frac16_t type is a signed 16-bit fractional type. It is able to store the variables within the range <-1 ; 1). Its definition is as follows: typedef short frac16_t; The following figure shows the way in which the data is stored by this type: Table 32.

  • Page 80: Acc16_T

    NXP Semiconductors Library types Table 33. Data storage (continued) -1.0 0.02606645970 -0.3929787632 To store a real number as frac32_t, use the FRAC32 macro. A.11 acc16_t acc16_t type is a signed 16-bit fractional type. It is able to store the variables within the range <-256 ; 256). Its definition is as follows: typedef short acc16_t;...

  • Page 81: Acc32_T

    NXP Semiconductors Library types To store a real number as acc16_t, use the ACC16 macro. A.12 acc32_t acc32_t type is a signed 32-bit accumulator type. It is able to store the variables within the range <-65536 ; 65536). Its definition is as follows: typedef long acc32_t;...
  • Page 82 NXP Semiconductors Library types actually stored) with value 1.0 is placed in front; therefore, bit 23 has a value of 0.5, bit 22 has a value 0.25, and so on. As a result, the mantissa has a value between 1.0 and 2. If the exponent reaches -127 (binary 00000000), the leading 1.0 is no longer used to enable the gradual underflow.
  • Page 83 NXP Semiconductors Library types Table 36. Data storage - normalized values (continued) Table 37. Data storage - denormalized values 24 23 16 15 Value Exponent Mantissa 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -0.0...

  • Page 84: Gmclib_3Coor_T_F16

    NXP Semiconductors Library types Table 38. Data storage - special values 24 23 16 15 Value Exponent Mantissa ∞ 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -∞...

  • Page 85: Gmclib_2Coor_Ab_T_F16

    NXP Semiconductors Library types float_t fltC; } GMCLIB_3COOR_T_FLT; The structure description is as follows: Table 40. GMCLIB_3COOR_T_FLT members description Type Name Description float_t fltA A component; 32-bit single precision floating-point type float_t fltB B component; 32-bit single precision floating-point type...

  • Page 86: Gmclib_2Coor_Albe_T_F16

    NXP Semiconductors Library types A.18 GMCLIB_2COOR_ALBE_T_F16 GMCLIB_2COOR_ALBE_T_F16 structure type corresponds to the two-phase stationary coordinate system, based on the Alpha and Beta orthogonal components. Each member is of the frac16_t data type. The structure definition is as follows: typedef struct frac16_t f16Alpha;...

  • Page 87: Gmclib_2Coor_Dq_T_F32

    NXP Semiconductors Library types Table 45. GMCLIB_2COOR_DQ_T_F16 members description Type Name Description frac16_t f16D D-component; 16-bit fractional type frac16_t f16Q Q-component; 16-bit fractional type A.21 GMCLIB_2COOR_DQ_T_F32 GMCLIB_2COOR_DQ_T_F32 structure type corresponds to the two-phase rotating coordinate system, based on the D and Q orthogonal components.

  • Page 88: Gmclib_2Coor_Sincos_T_Flt

    NXP Semiconductors Library types frac16_t f16Cos; } GMCLIB_2COOR_SINCOS_T_F16; The structure description is as follows: Table 48. GMCLIB_2COOR_SINCOS_T_F16 members description Type Name Description frac16_t f16Sin Sin component; 16-bit fractional type frac16_t f16Cos Cos component; 16-bit fractional type A.24 GMCLIB_2COOR_SINCOS_T_FLT GMCLIB_2COOR_SINCOS_T_FLT structure type corresponds to the two-phase coordinate system, based on the Sin and Cos components of a certain angle.

  • Page 89: True

    NXP Semiconductors Library types A.26 TRUE TRUE macro serves to write a correct value standing for the logical TRUE value of the bool_t type. Its definition is as follows: #define TRUE ((bool_t)1) #include "mlib.h" static bool_t bVal; void main(void) bVal = TRUE;...

  • Page 90: Frac32

    NXP Semiconductors Library types A.29 FRAC32 FRAC32 macro serves to convert a real number to the frac32_t type. Its definition is as follows: #define FRAC32(x) ((frac32_t)((x) < 1 ? ((x) >= -1 ? (x)*0x80000000 : 0x80000000) : 0x7FFFFFFF)) The input is multiplied by 2147483648 (=2 ).
  • Page 91 NXP Semiconductors Library types a32Val = ACC32(-13.654437); /* a32Val = -13.654437 */ GMCLIB User's Guide, Rev. 5, 01 November 2021 User Guide 91 / 92...
  • Page 92 Right to make changes - NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof.

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