Table of Contents
Advertisement
Functional Description
Features
3
Feature
Processor
L2 Cache
FLASH
SDRAM
Memory Controller
PCI Host Bridge
Interrupt Controller
3-2
The following table summarizes the features of the PrPMC750 processor
module.
Table 3-1. PrPMC750 Features
Single MPC750 Processor
Core Frequency up to 366 MHz
Bus Clock Frequencies up to 100 MHz.
Address and data bus parity
1MB back side L2 Cache using pipeline burst-mode SRAMS
Data bus parity
Bank A: 8 MB Soldered on-board using two 32 Mbit devices.
Bank B: Second bank of FLASH (up to 64 MB) can be located on host
board and accessed through the PMC P14 connector.
Double-Bit-Error detect, Single-Bit-Error correct across 72 bits
Single bank of 16-bit wide devices onboard provide 32MB, 64MB, or
128MB SDRAM
Optional memory mezzanine adds 32MB to 768MB of SDRAM
Hawk's SMC (System Memory Controller)
Hawk's PHB (PCI Host Bridge)
Hawk's MPIC (Multi-Processor Interrupt Controller)
Description
Computer Group Literature Center Web Site
Advertisement
Table of Contents
