Motorola PRPMC750 Installation And Use Manual page 99

Processor pmc module
Table of Contents

Advertisement

<PPC6-Diag>
PPCBug
basics
5-1
command syntax
commands
memory requirements
overview
prompt
5-2
PPCBug commands
uses of
5-1
PPCBug debugger firmware
PrPMC750
3-1
asynchronous serial port
bus arbitration
clock generator
described
FLASH memory
general description
Hawk ASIC
initialization
interrupt routing
interrupts
LEDs
2-3
memory controller
MONARCH# signal
on-board SDRAM memory
on-board SROM
PCI connectors
PCI interrupt signals
PMC connectors
PRESENT# signal
RESETOUT_L signal
status indicators
timers
3-10
voltage differences
I
Watchdog timers
N
PrPMC750 Configuration
D
PrPMC750 installation
PRESENT# Signal
E
use
3-13
X
Primary SCSI Bus Negotiations
Primary SCSI Data Bus Width
IN-4
5-2
5-6
5-5
5-3
5-1
6-1
3-12
3-5
3-12
1-1
3-6
3-3
3-5
2-1
3-11
3-5
3-7
3-13
3-6
3-10
3-12
3-13
4-4
3-13
3-14
2-3
3-12
3-11
1-5
1-8
6-4
6-5
processor core voltage
on PrPMC750
3-12
prompt, debugger
5-10
prompts
PPCBug
5-2
R
RAM104
models
3
registers
system
3-10
related documentation
A-1
related specifications
A-5
RESETOUT_L Signal
purpose
3-14
restart mode
5-13
RF emissions
B-5
ROM Boot Enable
6-7
ROM First Access Length
ROMboot enable 6-7,
6-10
ROMFAL
6-10
ROMNAL
ROM Next Access Length
S
SCSI bus
6-4
SCSI bus reset on debugger startup
SD command
5-10
SDRAM
controlled by
3-7
SDRAM installation
on PrPMC750
1-11
SDRAM memory
on PrPMC750
3-6
Secondary SCSI identifier
set environment to bug/operating system
(ENV)
6-3
shielded cables (see also cables)
slave/target
role of PrPMC750
1-2
specifications
B-1
SROM
Computer Group Literature Center Web Site
Index
6-10
6-10
6-4
6-5
B-5

Advertisement

Table of Contents
loading

Table of Contents