Introduction
2.2
MLTLDO2EVM-037 Design Details
2.2.1
Connector Ratings
Each board within the MLTLDO2EVM-037 comes with two sets of input and output connectors. The
banana connectors are rated for 60 Vdc maximum applied voltage, however banana cables are typically
rated for low voltage only. The user should review the voltage rating of the banana cables prior to applying
power to the EVM. If the banana cables are not rated for the voltage being applied to the EVM, the
terminal blocks must be used instead. For the purposes of this user guide, it is assumed that the banana
cables are rated up to 50 Vdc. For operation above 50 Vdc, the terminal blocks must be used. Either set
of connectors may be used for the current draw of the EVM when the load current is less than or equal to
5 Adc.
2.2.2
EVM Operation Up To 50 Vdc (KVU|5 Package) or 100 Vdc (DCY, DDA, and KVU|3 Packages)
The IPC-2221 standard was used during the design of the MLTLDO2EVM-037 to set the conductor
spacing between low-voltage nets and high-voltage nets. Specifically, column A6 of Table 6-1 was used
during the design of the EVM. The boards carrying the DCY, DDA, and 3-pin KVU packages were
designed with 100 Vdc spacing in accordance with the IPC-2221 standard, Table 6-1, column A6. The
board carrying the 5-pin KVU package was also designed with 100 Vdc spacing in accordance with the
IPC-2221 standard, Table 6-1, column A6; however the 5-pin KVU package pin spacing is too narrow to
meet 100 Vdc clearance. This board is therefore rated up to 50 Vdc in accordance with the IPC-2221
standard.
2.2.3
The Importance of a Clean PCB
Prior to connecting power to any circuit board, it is always important to ensure the PCB is free from
contaminants. These contaminants can come in the form of flux residue, oils deposited from handling the
PCB, dirt, or other sources of foreign object debris (FOD). Contaminants affect the electrical
characteristics of the PCB by lowering the isolation impedance between traces. Furthermore, they can
introduce additional leakage paths into the system. If the PCB is to be used at high voltage, it is critical
that the board is clean from contaminants, as arcing through the contaminants may occur. The
MLTLDO2EVM-037 is shipped from the factory clean from contaminants. If you believe the board may
have contaminants, please consult your organization's procedures on testing for contaminants or refer to
IPC-TM-650. Common methods of cleaning a PCB include a DI bath or use of a specially made PCB
cleaning product readily available through distributors. To clean the PCB, consult the processes in your
organization for the right cleaning process for your hardware. Alternatively, refer to IPC-CH-65B which
offers guidelines on cleaning printed-circuit boards and assemblies.
2.2.4
EVM System Grounding
Each board within the MLTLDO2EVM-037 is electrically isolated from the other three boards in the EVM.
External mounting holes are provided to mount the EVM to the system chassis. An 0805-sized surface
pad is placed near each mounting hole. If populated, the components will tie the mounting hole to the
internal board ground plane. The user may short these pads if the chassis should be tied directly to
ground. If the EVM will be floating, it is recommended that the user capacitively couple the EVM to the
chassis using an 0805-sized capacitor.
2.3
EVM Mounting Hole Locations
Each of the four boards within the MLTLDO2EVM-037 has mounting holes for standoffs or placement into
a chassis. The mounting hole locations on an individual board are separated in width by 1.71 inches and
length by 3.315 inches. The MLTLDO2EVM-037 mounting hole locations are separated in width by 8.925
inches and length by 3.315 inches.
6
MLTLDO2EVM-037 Evaluation Module
Copyright © 2020, Texas Instruments Incorporated
www.ti.com
SBVU065 – May 2020
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