Silicon Laboratories C8051F912 User Manual page 18

C8051F912-DK
7.6. Expansion I/O Connector (P1)
The 96-pin Expansion I/O connector P1 provides access to all signal pins of the C8051F912 device (except the C2
debug interface signals). In addition, power supply and ground pins are included. A small through-hole prototyping
area is also provided. See Table 2 for a list of pin descriptions for P1.
Row A
Pin #
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
18
Downloaded from Elcodis.com electronic components distributor
Table 2. P1 Pin Descriptions
Description
1 +3 VD
2 nc
3 nc
4 nc
5 nc
6 nc
7 nc
8 nc
9 nc
nc
P0.5/RX
P0.2H
P2.7H
P1.4
P1.1
nc
nc
nc
nc
nc
nc
nc
nc
nc
nc
GND
nc
nc
nc
nc
nc
nc
Row B
Description
Pin #
1 GND
2 nc
3 nc
4 nc
5 nc
6 nc
7 nc
8 nc
9 nc
10
P0.7/IREF0
11
P0.4/TX
12
P0.1/AGND
13 P1.6
14 P1.3
15 P1.0
16 nc
17 nc
18 nc
19 nc
20 nc
21 nc
22 nc
23 nc
24 nc
25 GND
26 nc
27 nc
28 VDD/DC+
29 nc
30 nc
31 nc
32 GND
Rev. 0.1
Row C
Description
Pin #
1 nc
2 nc
3 nc
4 nc
5 nc
6 nc
7 nc
8 nc
9 nc
10
P0.6/CNVSTR
11 P0.3H
12
P0.0/VREF
13 P1.5
14 P1.2
15 nc
16 nc
17 nc
18 nc
19 nc
20 nc
21 nc
22 nc
23 nc
24 nc
25 nc
26 nc
27 nc
28 VBAT
29 nc
30 nc
31 nc
32 nc