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C 8 0 5 1 F 9 3 0 W
I R E L E S S
1. Introduction
The Silicon Labs Wireless Product Software Development Board, MSC-DBSB8, is designed to help engineers
develop code for the Silicon Lab's EZRadio® and EZRadioPRO™ wireless products using the Silicon Labs
C8051F9xx microcontroller platform.
The C8051F9xx Wireless Software Development Board (MSC-DBSB8) is designed for code development. A
second platform, the WDS Loadboard, may also be purchased allowing for exhaustive RF lab based testing. The
Loadboard can be bought under the part number MSC-DKLB2 but also within the ISM-DK3 kit.
Figure 1. MSC-DBSB8
Software Development Board (SDB)
Both boards come with the Silicon Labs standard 40-pin socket for connecting standard EZRadio® and
EZRadioPRO™ evaluation testcards such as the Si4432-DKDB1. The onboard C8051F930 comes preloaded with
sample firmware to demonstrate a packet-based wireless link between two systems.
The MSC-DBSB8 C8051F9xx software development board includes:
One 40-pin socket for EZRadio and EZRadioPRO testcards
C8051F930 microcontroller preloaded with demonstration software
Standard debug connector for Silicon Labs C8051 programming and debugging
4 buttons and 4 LEDs for custom purposes
LCD display for setup parameters and information display
RS232 interface via a 9-pin DSUB male connector
USB type B connector with Silicon Labs CP2102 USB > Serial Converter onboard
On board 3.3 V PSU
5 x 19 through hole breadboard area for customer's application
Rev. 0.3 2/09
S
D
O FT W A RE
E V E L O P M E N T
Testing Platform for controlled Lab Tests
Copyright © 2009 by Silicon Laboratories
S D B C - D K 3 U G
K
U
I T
Figure 2. MSC-DBLB2 (Not Included)
(Loadboard)
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G
SE R
S
UID E
SDBC-DK3 UG
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Table of Contents
Related Manuals for Silicon Laboratories C8051F930
Summary of Contents for Silicon Laboratories C8051F930
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Page 1: Introduction
(Loadboard) Both boards come with the Silicon Labs standard 40-pin socket for connecting standard EZRadio® and EZRadioPRO™ evaluation testcards such as the Si4432-DKDB1. The onboard C8051F930 comes preloaded with sample firmware to demonstrate a packet-based wireless link between two systems. - Page 2 SDBC-DK3 UG Rev. 0.3...
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Page 3: Table Of Contents
SDBC-DK3 UG ABLE O F ONTENTS Section Page 1. Introduction .............1 2. - Page 4 SDBC-DK3 UG 10.1. Flow Chart ............54 10.1.1.
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Page 5: Power Supply
SDBC-DK3 UG 2. Power Supply The board has three power options. The user can select between these options by the supply source selector switch (SW1). 2.1. On Board PSU The on board PSU supplies 3.3 VDC. In this mode, the board should be powered by a standard 9 V ac or 9–12 V dc adapter. -
Page 6: System Introduction: Ia Msc-Dbsb8 Icd Connector
SDBC-DK3 UG 3. System Introduction: IA MSC-DBSB8 ICD Connector Table 1. Debug Connector Pin # Description VDD (3.3 V) P2.7 RESET P2.7 RST/C2CK — — Figure 3. Debug Connector (Emulator and Programmer Interface) Rev. 0.3... - Page 7 SDBC-DK3 UG Table 2. 40-Pin Testcard Connector (J5) Pin # Description Pin # Description J6/1 (SPI_MOSI) J7/1 J15/1 J6/2 (SPI_SCK) J7/2 J15/2 J6/3 (RF_NSEL) J8/1 J7/3 EBID port (SPI_MOSI) J6/4 J7/4 EBID port (SPI_MISO) J6/5 J8/2 J7/5 EBID port (SPI_SCK) J6/6 J7/6 (RF_NIRQ) EBID port (EE_NSEL)
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Page 8: System Introduction: Schematic (Msc-Dbsb8)
SDBC-DK3 UG 4. System Introduction: Schematic (MSC-DBSB8) Rev. 0.3... - Page 9 SDBC-DK3 UG Rev. 0.3...
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Page 10: Typical Testboard Schematic (Si443X Testcard)
SDBC-DK3 UG 5. Typical Testboard Schematic (Si443x Testcard) Rev. 0.3... -
Page 11: Using The Sdb With A Standard Testcard
SDBC-DK3 UG 6. Using the SDB with a Standard Testcard The standard EZRadio or EZRadioPRO testcards that are typically plugged into the MSC-DBLB2 Loadboard when engineers are performing RF tests on the radio ICs can also be plugged into the 40pin socket on the Software Development Board (SDB), as demonstrated below. -
Page 12: Radio Evaluation
Reference firmware v3.xr is designed to show the Si443x in a packet error rate test demonstration. This firmware is preloaded on to the c8051F930 microcontroller, but it is also available on the WDS CD-ROMs in the SDB section. Source code to the Silicon Lab's firmware is also available in the same location, and is provided AS-IS for reference purposes. - Page 13 SDBC-DK3 UG Note: The following screen shots reference firmware version 3.5r, screen shots may differ slightly from the version you have received. Figure 9. Welcome Screen Users may by pass the introduction screen by pressing any of the pushbutton 1-4, alternatively wait until the screen times out and moves on itself.
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Page 14: Screen 2: Setting Up The Rf Parameters
SDBC-DK3 UG The Up/Down button (PB1) moves the arrow up and down the LCD screen. Figure 13. Active Menu Item Pointer The arrow is used to highlight the function that will change when the user presses the '+' and '-' buttons. In the screen shown above, 'Function:' is highlighted, pressing the '+' and '-' buttons will switch the mode of operation between demonstration mode and lab mode. - Page 15 SDBC-DK3 UG Figure 15. Antenna Diversity Testcard Figure 16. Split TX and RX Testcard (Rx: Left SMA, Tx: Right SMA) for Use with Coaxial Cable and RF Test Equipment for Scientific RF Evaluation Figure 17. Single-Ended TX and RX Testcard Rev.
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Page 16: Understanding Antenna Diversity And Where To Use It
SDBC-DK3 UG If the Antenna Diversity card is fitted then the 'Antenna Mode' option on the 3rd screen will be available, this line is automatically removed when non-antenna diversity cards such as the 4432-DKDB1 are inserted. With this options users have the ability to select antenna 1, antenna 2 or both (antenna diversity enabled). For typical operation select “1&2”. -
Page 17: Packet Length
SDBC-DK3 UG It can be seen from Table 3 and Table 4 that while the effects of antenna diversity on LOS environments are negligible, the benefits in indoor/urban environments can significantly help create robust, higher quality robust links. Figure 19. Screen 4: Setting Up the Node Parameters The Self ID on each card should already be selected and is contained in the EBID eeprom on the testcard. -
Page 18: Max Packets
SDBC-DK3 UG Consider the following: During the transmission of long packets, there is an increased chance that a disturbance may occur somewhere along that packet—thus the need to implement good CRC checks. During the transmission of short packets, there is an increased chance that the entire packet may be lost during a disturbance—thus the need to implement more retries. - Page 19 SDBC-DK3 UG Figure 22. Antenna Diversity Testcard Note: Depending on antenna selection the relevant antennas are shown on the top row and either ANTDIV, A_DIV(1), or A_DIV(2) is shown in the second line of text. The ready screen is designed to allow you to review the settings on both boards. In the example shown above, we illustrate the following configuration: ...
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Page 20: Running The Demonstration
SDBC-DK3 UG Figure 23. White LED Control This feature is only manually enabled since the brightness of the LED may be distracting when on desk operation is being implemented. 7.1.8. Running the Demonstration Longer tests provide better averages, but in the interest of time, this demonstration sends only 1000 packets. Users that modify the code can send as many or as few packets as they wish. - Page 21 SDBC-DK3 UG Figure 24. Active Antenna and RSSI Indications Rev. 0.3...
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Page 22: Lab Mode
SDBC-DK3 UG 7.2. Lab Mode The lab mode is intended for the users who want to evaluate the performance of the Silicon Labs RFICs, supported on the shipping firmware supplied with the SDB. Lab mode is intended so users can perform simple evaluations such as: ... - Page 23 SDBC-DK3 UG Figure 26. Lab Equipment Connection Diagram Rev. 0.3...
- Page 24 SDBC-DK3 UG Figure 27. Test Card Connection Diagram Figure 28. SDB Connection Diagram Rev. 0.3...
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Page 25: Transmitter Evaluation Setup
SDBC-DK3 UG 7.2.1. Transmitter Evaluation Setup The transmitter output of the 4432-DKDB1 test board can be connected to a spectrum analyzer in order to evaluate output power and spectrum plots. Alternatively the transmitter output may be connected to a vector signal analyzer to evaluate conditions such as freq vs time. - Page 26 SDBC-DK3 UG 7.2.3.2. Test Method Figure 29. Setup Screen (1 of 4) 1. Ensure “Lab Mode” is selected as the operating function. 2. Select CW. 3. Press <GO> to move on from this screen. Figure 30. Setup Screen (2 of 4) 1.
- Page 27 SDBC-DK3 UG Figure 31. Setup Screen (3 of 4) 1. Select the appropriate output power required for the test. 2. Press <GO> to move on from this screen. Note: If an alternate testcard is used, such as the antenna diversity test cards, users may see slightly different screen shots than those shown.
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Page 28: Results (Cw Tests)
SDBC-DK3 UG 7.2.4. Results (CW Tests) 7.2.4.1. Output Power 1. Set the center frequency of spectrum analyzer to the frequency under test. 2. Set span to 10 MHz. 3. Measure the TX output power on displayed plot. Figure 34. Spectrum Plot Showing CW Output at 917 MHz 7.2.4.2. -
Page 29: Pn9 Measurement
SDBC-DK3 UG 7.2.4.3. Phase Noise 1. Set the Spectrum analyzer to “Phase Noise”. 2. Set the center frequency of spectrum analyzer to the frequency selected. 3. Set the spectrum analyzer to the desired span (typically from 100 Hz to 10 MHz span). Figure 36. - Page 30 SDBC-DK3 UG Figure 38. Setup Screen (2 of 4) 1. Select the appropriate frequency, data rate, and modulation. 2. Press <GO> to move on from this screen. Figure 39. Setup Screen (3 of 4) 1. Select the desired output power. 2.
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Page 31: Results (Pn9 Tests)
SDBC-DK3 UG Figure 41. Runtime Screen In Figure 41, the runtime screen will summarize the current valid settings. 7.2.6. Results (PN9 Tests) 7.2.6.1. TX Output Spectrum 1. Set the center frequency of spectrum analyzer to the frequency under test. 2. Set span to 500 kHz and observe the TX spectrum. 7.2.6.2. -
Page 32: Receiver Measurements
SDBC-DK3 UG 7.2.7. Receiver Measurements 7.2.7.1. Bit Error Rate Test Using the BER Lab Mode users may evaluate the following: 1. BER Sensitivity. 2. Direct mode operation using a continuous data streams 3. Receiver modem parameters: i. Automatic Frequency Control ii. - Page 33 SDBC-DK3 UG Figure 45. Setup Screen (3 of 4) 1. Parameters on setup screen 3 are not relevant to BER evaluations. Silicon Labs recommends leaving them at their default values. 2. Press <GO> to move on from this screen. Figure 46. Setup Screen (4 of 4) 1.
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Page 34: Results (Ber Test)
SDBC-DK3 UG 7.2.8. Results (BER Test) 7.2.8.1. BER Sensitivity Evaluation BER results will be shown on the BER instrument or recorded by either RF generators or IQ modulators that have a BER option installed. The top trace in Figure 48 demonstrates TX_Data as sent by a transmitter and the bottom trace is the data received on the GPIO pin. -
Page 35: Packet Error Test
SDBC-DK3 UG 7.2.9. Packet Error Test Using the PER Lab Mode users may evaluate the following: 1. PER Sensitivity 2. FIFO mode using predefined packet structures (see datasheet for further details) 3. Receiver modem parameters: i. Automatic Frequency Control ii. Blocking iii. - Page 36 SDBC-DK3 UG Figure 51. Setup Screen (3 of 5) 1. Parameters on setup screen 4 are not relevant to PER evaluations. Silicon Labs recommends leaving them at their default values. 2. Press <GO> to move on from this screen. Figure 52. Setup Screen (4 of 5) 1.
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Page 37: Results (Per Test)
SDBC-DK3 UG Figure 54. Runtime Screen In Figure 54, the runtime screen will summarize the current valid settings. Notes: 1. TR = Trigger sent on P1.4. 2. MP = Missed packets 3. PER = Packet error rate 7.2.10. Results (PER Test) 7.2.10.1. -
Page 38: Additional Information
SDBC-DK3 UG 7.3. Additional Information 7.3.1. USB Communications To enable greater analysis of the data information regarding the test is sent out over the USB and can be viewed via a serial terminal emulator such as the WDS Terminal Emulator found on the WDS CDROM. To configure the MSC-DBSB8 software development board to communicate with a PC via the USB port, a virtual serial port driver needs to be installed on the PC. -
Page 39: Packet Structure
SDBC-DK3 UG 7.3.2. Packet Structure The packet structure used by this demonstration is very simple but is not much different than a typical packet found in many RF applications today. Figure 57. Packet Format Defined in the Packet Error Rate Test Rev. -
Page 40: Custom Software Development
EZRadioPRO product family, however, the kit is also designed to be used for basic code development on any of the RF products offered by Silicon Laboratories. By design, the kit offers two modes of operation; demonstration mode or lab mode. - Page 41 SDBC-DK3 UG Set VCOCurrentTrimming, Chip version DividerCurrentTrimmingAGCOveride, and DeltasigmaADCTuning value for optimization specific to chip version Registers: 0x5A, 0x59, 0x6A, 0x68 Set capacitance bank to TX/RX adjust the offset offset? Register: 0x09 Set center frequency of operation Register: 0x75, 0x76, 0x77 Set TX/RX Header for header Use TX/RX check...
- Page 42 SDBC-DK3 UG RF chip in Set Register 0x07 Idle Mode ( 0x8701 ) RF chip in Set Register 0x07 Receive ( 0x8705 ) Mode While (1) RFPacketReceived Continuous ( &packet[0],&length) ) receive mode RFReceive () nIRQ Return: interrupt RF_NO_PACKET occurred? Read out Interrupt Status Read Registers...
- Page 43 SDBC-DK3 UG DO a Burst Read from Set Packet Length Information Set Register 0x3E Register 0x7F FIFO ( Read ) (<64 bytes) DO a Burst Write to FIFO Write Register 0x7F (<64 bytes) ( Write ) Check packet for validation RF chip in Set Register 0x07 Transmit...
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Page 44: Basic Code Overview
SDBC-DK3 UG 8.1.1. Basic Code Overview Main () (main.c) Hardware Initialization MCU hardware, system clock setup, and I/O init Hardware SPI pin definition (C8051.h) nSEL and nIRQ pin definition SPI read/write function protocol i.e., #define SYSCLK (16000000L/2) #define SPI_CLOCK (SYSCLK/4) //RF chip SBIT(RF_NSEL_PIN, SFR_P1, 3);... -
Page 45: Basic Hardware Connections
SDBC-DK3 UG 8.2. Basic Hardware Connections LED 1 nSEL Si4432 C 8051F930 nIRQ LED 2 30MHz Figure 62. Basic Hardware Connections Rev. 0.3... -
Page 46: Main
SDBC-DK3 UG 9. Main The main module main.c should include the main () function that is called upon startup. The main function should first call several initialization routines and then the main program loop itself. Many of the initialization and internal functions may be specific to the MCU hardware. -
Page 47: Main Source File
SDBC-DK3 UG 9.2. Main Source File /************************************************************************************ FILE --- MAIN.C DESCRIPTION This is the main file of the project. CREATED Silicon Laboratories Hungary Ltd COPYRIGHT Copyright 2008 Silicon Laboratories, Inc. http://www.silabs.com *************************************************************************************/ /*------------------------------------------------------------------------------------- INCLUDE -------------------------------------------------------------------------------------*/ #include "C8051.h" #include "Si4432.h" /*--------------------------------------------------------------------------------------... - Page 48 SDBC-DK3 UG The foreground loop continuously polls the nIRQ pin of the receiver. If the nIRQ is active (low), the microcontroller starts a status read. Then reads out the data packets from the FIFO. while (1) // stay in receiving mode switch ( RFPacketReceived(&packet[0],&length) ) // check the status packet reception case RF_NO_PACKET:...
- Page 49 SDBC-DK3 UG Receiver will discard corrupted data packet and restart in continuous receive mode. case RF_CRC_ERROR: // packet received with wrong CRC RFIdle(); // disable receiver RFReceive(); // start continuous receive break; default: break; /*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ FUNCTION NAME: void Init(void) DESCRIPTION: This function configures the HW INPUT: None...
- Page 50 SDBC-DK3 UG P0MDIN 0xF3; P0MDOUT 0x10; P0SKIP 0xCF; P1MDIN 0xFF; P1MDOUT 0xFD; P1SKIP 0xF8; P2MDIN 0xFF; P2MDOUT 0xFC; P2SKIP 0xFF; SFRPAGE CONFIG_PAGE; P0DRV 0x10; P1DRV 0xFD; P2DRV 0xFC; SFRPAGE LEGACY_PAGE; XBR0 0x01; XBR1 0x40; XBR2 0x40; // set inputs |= 0xE3; //Set P0 inputs |= 0x02;...
- Page 51 SDBC-DK3 UG /*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ FUNCTION NAME: void delay_ms(void) DESCRIPTION: This function generates milliseconds delay INPUT: Number of milliseconds RETURN: None NOTES: None ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/ void delay_ms(uint8 delay) xdata uint8 i; xdata uint16 j; for(i=0;i<delay;i++) for(j=0;j<8000;j++); //delay 1ms Rev. 0.3...
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Page 52: Si4432
SDBC-DK3 UG 10. Si4432 The Si4432.c module contains code for all Si4432 related RF functions including RF setup parameters; Status Read, Transmit, Receive, and Idle state. There is a global variable (a table) 'RfSettings', which contains the preset modem parameters for each set of different data rates. These settings can be modified for other application specific settings using values calculated based on the datasheet or through the EZRadioPRO Register Calculator (available on WDS CDROM). - Page 53 SDBC-DK3 UG ============================================================================ // This table contains the modem parameters for different data rates. See the comments for more details code uint8 RfSettings[NMBR_OF_SAMPLE_SETTING][NMBR_OF_PARAMETER] = // revV2 // IFBW, COSR, CRO2, CRO1, CRO0, CTG1, CTG0, TDR1, TDR0, MMC1, FDEV,AFC, ChargepumpCT {0x01, 0x83, 0xc0, 0x13, 0xa9, 0x00, 0x05, 0x13, 0xa9, 0x20, 0x3a, 0x40, 0x80}, //DR: 2.4kbps, DEV:+-36kHz, BBBW: 75.2kHz {0x04, 0x41, 0x60, 0x27, 0x52, 0x00, 0x0a, 0x27, 0x52, 0x20, 0x48, 0x40, 0x80}, //DR: 4.8kbps, DEV: +-45kHz, BBBW: 95.3kHz...
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Page 54: Flow Chart
SDBC-DK3 UG 10.1. Flow Chart 10.1.1. RF Packet Received( ) RF Packet Received () If nIRQ goes low 1) Read out Interrupt Status 1 Registers for valid packet bit 1) Get Packet Length from register 0x4B Valid Packet ? 2) Do a FIFO burst read from register 0x7F 3) Disable receiver 1) Disable receiver... -
Page 55: Si4432 Header File
/************************************************************************************* FILE --- Si4432.h DESCRIPTION Header files for Si4432 usage, contains RF specific definition and type declaration CREATED Silicon Laboratories Hungary Ltd COPYRIGHT Copyright 2008 Silicon Laboratories, Inc. http://www.silabs.com *************************************************************************************/ #ifndef Si4432_H #define Si4432_H #include "C8051.h" /* ========================================= * APPLICATION SPECIFIC DEFINITIONS... - Page 56 SDBC-DK3 UG /* ==========================================* T Y P E D E C L A R A T I O N * ==========================================*/ // RF stack enumerations typedef enum _RF_ENUM RF_OK 0x00, // function response parameters RF_ERROR_TIMING 0x01, RF_ERROR_PARAMETER 0x02, RF_PACKET_RECEIVED 0x03, RF_RX_FIFO_ALMOST_FULL 0x04, RF_NO_PACKET...
- Page 57 SDBC-DK3 UG AFCLoopGearshiftOverride = 0x1D, AFCTimingControl = 0x1E, ClockRecoveryGearshiftOverride = 0x1F, ClockRecoveryOversamplingRatio = 0x20, ClockRecoveryOffset2 = 0x21, ClockRecoveryOffset1 = 0x22, ClockRecoveryOffset0 = 0x23, ClockRecoveryTimingLoopGain1 = 0x24, ClockRecoveryTimingLoopGain0 = 0x25, ReceivedSignalStrengthIndicator = 0x26, RSSIThresholdForClearChannelIndicator = 0x27, AntennaDiversityRegister1 = 0x28, AntennaDiversityRegister2 = 0x29, DataAccessControl = 0x30, EZmacStatus...
- Page 58 SDBC-DK3 UG DeltasigmaADCTuning1 = 0x67, DeltasigmaADCTuning2 = 0x68, AGCOverride1 = 0x69, AGCOverride2 = 0x6A, GFSKFIRFilterCoefficientAddress = 0x6B, GFSKFIRFilterCoefficientValue = 0x6C, TXPower = 0x6D, TXDataRate1 = 0x6E, TXDataRate0 = 0x6F, ModulationModeControl1 = 0x70, ModulationModeControl2 = 0x71, FrequencyDeviation = 0x72, FrequencyOffset = 0x73, FrequencyChannelControl = 0x74, FrequencyBandSelect...
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Page 59: Si4432 Source File
10.3. Si4432 Source File /************************************************************************************* FILE --- Si4432.c DESCRIPTION Contains all Si4432 RF functions CREATED Silicon Laboratories Hungary Ltd COPYRIGHT Copyright 2008 Silicon Laboratories, Inc. http://www.silabs.com *************************************************************************************/ #include "C8051.h" #include "Si4432.h" /*-----------------------------------------------------------------------------------*/ GLOBAL variables /*----------------------------------------------------------------------------------*/ // This table contains the modem parameters for different data rates. See the comments for more details... - Page 60 SDBC-DK3 UG RF_NSEL_PIN = 1; // initialize I/O port directions ItStatus1 = SpiRfReadRegister(InterruptStatus1); // read interrupt status ItStatus2 = SpiRfReadRegister(InterruptStatus2); // SW reset -> wait for POR interrupt SpiRfWriteAddressData((REG_WRITE | OperatingFunctionControl1), 0x80); // Enable the POR interrupt while ( RF_NIRQ_PIN == 1); // Wait for the POR interrupt // disable all ITs, except 'ichiprdy' SpiRfWriteAddressData((REG_WRITE | InterruptEnable1), 0x00);...
- Page 61 SDBC-DK3 UG SpiRfWriteAddressData((REG_WRITE | SyncWord3), 0x2D); SpiRfWriteAddressData((REG_WRITE | SyncWord2), 0xD4); Figure 66. Rev. 0.3...
- Page 62 SDBC-DK3 UG GPIO definitions // set GPIO0 to RX DATA SpiRfWriteAddressData((REG_WRITE | GPIO0Configuration), 0x14); // set GPIO1 to TX State & GPIO2 to RX State SpiRfWriteAddressData((REG_WRITE | GPIO1Configuration), 0x12); SpiRfWriteAddressData((REG_WRITE | GPIO2Configuration), 0x15); Next, define your RF parameters based on application specific data rate, deviation, receive baseband bandwidth etc., // set modem and RF parameters according to the selected DATA rate RFSetRfParameters(data_rate);...
- Page 63 SDBC-DK3 UG /*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ FUNCTION NAME: RF_ENUM RFSetRfParameters (RF_SAMPLE_SETTINGS setting) DESCRIPTION: This function configures the RF part of the chip (both TX and RX) for different (predefined) data rate, deviation and modulation index requirements. RETURN: RF_OK: The operation was successful RF_ERROR_PARAMETER: Invalid parameter, operation is ignored. NOTES: +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/ RF_ENUM RFSetRfParameters(RF_SAMPLE_SETTINGS setting)
- Page 64 SDBC-DK3 UG /*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ FUNCTION NAME: RF_ENUM RFIdle(void) DESCRIPTION: Sets the transceiver and the RF stack into IDLE state, independently of the actual state of the RF stack. RETURN: RF_OK: The operation was successful NOTES: ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/ RF_ENUM RFIdle(void) // disable transmitter and receiver SpiRfWriteAddressData((REG_WRITE | OperatingFunctionControl1), 0x01);...
- Page 65 SDBC-DK3 UG ItStatus2 = SpiRfReadRegister(InterruptStatus2); // wait for the packet sent interrupt while(RF_NIRQ_PIN == 1); // packet is sent correctly return RF_OK; /*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ FUNCTION NAME: RF_ENUM RFReceive(void) DESCRIPTION: Starts packet reception INPUT: None RETURN: RF_OK: The operation was successful NOTES: ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/ RF_ENUM RFReceive(void) // enable receiver chain...
- Page 66 SDBC-DK3 UG /*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ FUNCTION NAME: RF_ENUM RFPacketReceived (uint8 * packet, uint8 * length) DESCRIPTION: Check whether the packet received or not. INPUT: Pointers for storing data and length RETURN: RF_PACKET_RECEIVED: Packet received RF_NO_PACKET: Packet is not yet received RF_CRC_ERROR: Received a packet with CRC error NOTES: ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/ RF_ENUM RFPacketReceived (uint8 * packet, uint8 * length)
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Page 67: C8051
11.1. C8051 Header File /************************************************************************************* FILE --- C8051.h DESCRIPTION Contains the 8051 specific declarations, IO declarations, type declarations CREATED Silicon Laboratories Hungary Ltd COPYRIGHT Copyright 2008 Silicon Laboratories, Inc. http://www.silabs.com ************************************************************************************** #ifndef C8051_H #define C8051_H #include <compiler_defs.h> // compiler declarations #include <C8051F930_defs.h>... - Page 68 SDBC-DK3 UG /* ========================================== * T Y P E D E C L A R A T I O N * ========================================== */ //Only these types of variables are used in this software #undef uint8 #undef sint8 #undef uint16 #undef sint16 #undef uint32...
- Page 69 SDBC-DK3 UG I/O definitions. The RF_NSEL_PIN and RF_NIRQ_PIN port are created separately as the Hardware SPI ports use only 3-wires. //I/O pin definitions SBIT(LED1_PIN, SFR_P1, 4); SBIT(LED2_PIN, SFR_P1, 5); SBIT(LED3_PIN, SFR_P1, 6); SBIT(LED4_PIN, SFR_P1, 7); SBIT(BLED_PIN, SFR_P2, 2); SBIT(PB1_PIN, SFR_P0, 0); SBIT(PB2_PIN, SFR_P0, 1);...
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Page 70: C8051 Source File
11.2. C8051 Source File /************************************************************************************* FILE --- C8051.c DESCRIPTION Contains all the low level, 8051 dependent functions CREATED Silicon Laboratories Hungary Ltd COPYRIGHT Copyright 2008 Silicon Laboratories, Inc. http://www.silabs.com *************************************************************************************/ #include "C8051.h" /*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ FUNCTION NAME: void SetHwMasterSpi(void) DESCRIPTION: Initialize the HW SPI port... - Page 71 SDBC-DK3 UG /*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ FUNCTION NAME: void SpiWrite(uint8 spi_in) DESCRIPTION: Sends 8 bits length data through the SPI port INPUT: Data RETURN: None NOTES: It doesn't control the nSEL pin ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/ void SpiWrite(uint8 spi_in) SPI1DAT = spi_in; //write data into the SPI register while( SPIF1 == 0);...
- Page 72 SDBC-DK3 UG /*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ FUNCTION NAME: uint8 SpiReadRegister(uint8 address) DESCRIPTION: Read a register of the radio INPUT: Address - register address RETURN: Value of the register NOTES: It controls the nSEL pin of the radio ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/ uint8 SpiRfReadRegister(uint8 address) uint8 temp8; RF_NSEL_PIN = 0;...
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Page 73: Troubleshooting
SDBC-DK3 UG 12. Troubleshooting Q1: My Software Development Board (SDB) displays an error message on startup. A1: Factory firmware is designed to operate with officially approved testcards. The EBID (see Figure 20, “Test Card Characteristics EEPROM (EBID),” on page 17) contain an authentication code to enable the use of the testcard with the factory firmware. -
Page 74: Document Change List
SDBC-DK3 UG OCUMENT HANGE Revision 0.2 to Revision 0.3 Added Lab Mode instructions. Added software programmers guide. Rev. 0.3... - Page 75 SDBC-DK3 UG OTES Rev. 0.3...
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Page 76: Contact Information
Silicon Laboratories products are not designed, intended, or authorized for use in applications intended to support or sustain life, or for any other application in which the failure of the Silicon Laboratories product could create a situation where per- sonal injury or death may occur.
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