Independent Analog Peripherals Supply - ST STM32U5 Getting Started

Figure 6.
(1) Only available on specific packages.
(2) Only for STM32U5Fx/5Gx devices.
In devices without SMPS, the V
and reset block). The V
Note: If the selected package has the SMPS step-down converter option but the SMPS is not used by the application
(and the embedded LDO is used instead), the SMPS power supply pins must be set as follows:
• VDDSMPS and VLXSMPS connected to VSS
• VDD11 pins connected to VSS through two 2.2 µF capacitors as in normal mode
2.1.1

Independent analog peripherals supply

To improve ADC and DAC conversion accuracy and to extend the supply flexibility, the analog peripherals have
an independent power supply that can be separately filtered and shielded from noise on the PCB.
The voltage supply input of the analog peripherals is available on a separate VDDA pin. An isolated supply
ground connection is provided on VSSA pin.
The V supply voltage can be different from V
DDA
logically and electrically isolated and therefore are not available. The isolation must be removed before using
these peripherals, by setting the ASV bit in PWR_SVMCR, once the V
The V supply can be monitored by analog voltage monitors (AVM), and compared with two thresholds
DDA
(1.6 V for AVM1 or 1.8 V for AVM2). For more details, refer to the device datasheet and section Peripheral voltage
monitoring (PVM) of document [1].
When a single supply is used, the VDDA pin can be externally connected to the same V
external filtering circuit, to ensure a noise-free V
AN5373 - Rev 6
STM32U5F/5G/59/5Axxx power supply overview (without SMPS)
VDDA
VSSA
VDDUSB
VDD11USB (1)
VSS
VDDIO2
VSS
V
V
DDIO1
Reset block
Temperature sensor
3 x PLL
VSS
Internal RC oscillators
Standby circuitry
VDD
(Wake-up logic, IWDG)
VCAP
LDO regulator
Low-voltage detector
V LSE crystal 32kHz oscillator
SW
VBAT
LSI 32 kHz oscillator
Backup registers
RCC_BDCR and PWR_BDCR1 registers
RTC
TAMP
BKPSRAM
supply source feeds the I/Os and system analog peripherals (such as PLLs
DD
power supply for digital peripherals and memories is generated from the LDO.
CORE
DD
DD
V domain
DDA
A/D converters
Comparators
D/A converters
Operational amplifiers
Voltage reference buffer
USB transceiver
V domain
DDIO2
V
DDIO2
I/O ring
PG[15:2]
domain
DD
I/O ring
V
CORE
Core
SRAM1
SRAM2
SRAM3
SRAM4
SRAM5
V
SRAM6
CORE
Digital
peripherals
Flash memory
Backup domain
. After reset, the analog peripherals supplied by V
supply is present.
DDA
reference voltage.
AN5373
Power supplies
domain
(2)
are
DDA
supply, through an
DD
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