Ic Pinfunctions - Sony CDP-XE530 Service Manual

Hide thumbs Also See for CDP-XE530:
Table of Contents

Advertisement

CDP-XE530

6-10. IC PINFUNCTIONS

• IC101 DIGITAL SIGNAL PROCESSOR (CXD2585Q)(BD board)
Pin No.
Pin Name
I/O
1
DVDD
Digital power supply
2
XRST
I
System reset "L" : reset
3
MUTE
I
Muting input "H" : mute
4
DATA
I
Serial data input, supplied from CPU
5
XLAT
I
Latch input, supplied from CPU
6
CLOK
I
Serial data transfer clock input, supplied from CPU
7
SENS
O
SENS signal output to CPU
8
SCLK
I
SENS serial data read-out clock input
9
ATSK
I
Input pin for anti-shock (Connected to ground)
10
WFCK
O
WFCK output (Not used)
11
XUGF
O
Not used
12
XPCK
O
Not used
13
GFS
O
Not used
14
C2PO
O
Not used
15
SCOR
O
Sub-code sync output
16
CM4
O
4.2336 MHz output (Not used)
17
WDCK
O
Word clock output (ƒ = 2Fs)
18
DVSS
Digital ground
19
COUT
I/O
Numbers of track counted signal input/output (Not used)
20
MIRR
I/O
Mirror signal input/output (Not used)
21
DFCT
I/O
Defect signal input/output (Not used)
22
FOK
I/O
Focus OK input/output (Not used)
23
PWMI
I
Spindle motor external control input (Connected to ground)
24
LOCK
I/O
GFS is sampled by 460 Hz. H when GFS is H (Not used)
25
MDP
O
Output to control spindle motor servo
26
SSTP
I
Input signal to detect disc inner most track
27
FSTO
O
2/3 divider output of pin 71 (Not used)
28
DVDD1
Digital power supply
29
SFDR
O
Sled drive output
30
SRDR
O
Sled drive output
31
TFDR
O
Tracking drive output
32
TRDR
O
Tracking drive output
33
FFDR
O
Focus drive output
34
FRDR
O
Focus drive output
35
DVSS1
Digital ground
36
TEST
I
TEST pin connected normally to ground
37
TES1
I
TEST pin connected normally to ground
38
VC
I
Center voltage input pin
39
FE
I
Focus error signal input
40
SE
I
Sled error signal input
• Abbreviation
GFS : Guarded Frame Sync
Function
— 27 —
Pin No.
Pin Name
I/O
41
TE
I
Tracking error signal input
42
CE
I
Center servo analog input
43
RFDC
I
RF signal input
44
ADIO
O
Test pin (Not used)
45
AVSS0
Analog ground
46
IGEN
I
Stabilized current input for operational amplifiers
47
AVDD0
Analog power supply
48
ASYO
O
EFM full swing output
49
ASYI
I
Asymmetry comparate voltage input
50
RFAC
I
EFM signal input
51
AVSS1
Analog ground
52
CLTV
I
Control voltage input for master VCO1
53
FILO
O
Filter output for master PLL
54
FILI
I
Filter input for master PLL
55
PCO
O
Charge-pump output for master PLL
56
AVDD1
Analog power supply
57
BIAS
I
Asymmetry circuit constant current input
58
VCTL
I
VCO2 control voltage input for wide band EFM PLL (Connected to VDD)
59
V16M
I/O
VCO2 oscillator input/output for wide band EFM PLL (Not used)
60
VPCO
O
Charge-pump output for wide band EFM PLL (Not used)
61
DVDD2
Digital power supply
62
ASYE
I
Asymmetry circuit ON/OFF input "L" OFF, "H" : ON (Connected to VDD)
63
MD2
I
Digital-out ON/OFF control input (Connected to VDD)
64
DOUT
O
Digital-out output pin
65
LRCK
O
D/A interface LR clock output (ƒ = Fs)
66
PCMD
O
D/A interface serial data output
67
BCLK
O
D/A interface bit clock output
68
EMPH
O
Playback disc output in emphasis mode (Not used)
69
XTSL
I
X'tal selection input (Connected to ground)
70
DVSS2
Digital ground
71
XTAI
I
X'tal oscillator circuit input
72
XTAO
O
X'tal oscillator circuit output (Not used)
73
SOUT
O
Serial data output in servo block (Not used)
74
SOCK
O
Serial data read clock output in servo block (Not used)
75
XOLT
O
Serial data latch output in servo block (Not used)
76
SQSO
O
Sub-Q 80-bit and PCM peak level data output (CD text data output)
77
SQCK
I
Clock input for SQSO read-out
78
SCSY
I
Connected to ground
79
SBSO
O
Sub-P through Sub-W serial output (Not used)
80
EXCK
I
Clock input for SBSO read-out (Connected to ground)
• Abbreviation
EFM : Eight to Fourteen Modulation
PLL : Phase Locked Loop
Function
— 28 —

Advertisement

Table of Contents
loading

Table of Contents