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3.3.2
Digital Output Signal Connection (TTL DI/O)
A digital input/output (DI/O) channel can be configured by software to perform digital
input measurement, which is the power-on default configuration, or digital output
generation. When performing digital output generation, a voltage logic level is gener-
ated between the digital output (DO) terminal and the digital ground (DGND) termi-
nal. This is shown in Figure 3.4.
Each digital output channel can source or sink only finite amount of current. If this
limit is exceeded, the output voltage will not stay in the specified voltage logic level.
Refer to the device specifications for the maximum source and skin current values.
3.3.3
Counter Input Signal Connection (TTL, Pull-Up)
The voltage logic level between the counter input (counter clock, counter gate,
counter arm, and sample clock) terminals and the digital ground (DGND) terminal is
measured. To prevent undetermined or fluctuating results when input is floating, the
counter input signals are internally pulled-up. This is shown in Figure 3.5.
USB-4751/4751L User Manual
Figure 3.4 Digital output signal connection
Figure 3.5 Counter input signal connection
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