ZiLOG Z80-AIO Hardware User Manual page 28

Output System Calibration
The Output System is calibrated through the use of the
following program.
START:
LD A, LSB
OUT (DACL),A
LD A, MSB
OUT (DACH), A
JP START
DACL EQU XX
DACH EQU XX
END
Before tbe program is assembled, DACL and DACH must be set to
the I/O addresses of the low and high bytes of the digital to
analog Converter to be calibrated.
After assembling and loading, a breakpoint should be set at
the Jump instruction.
desired Converter will be set at its most negative Output.
The DAC should then be set by its offset control for its most
negative füll scale Output value, äs shown in Table 5.3.2.
allowed to reach thermal eguilibrium -- about 30 minutes
under power.
LSB = FFH FOR GAIN ADJ.
MSB = OH FOR UNIPOLAR OFFSET
MSB = 7H FOR BIPOLAR GAIN
MSB = OFH FOR UNIPOLAR GAIN
20