Xilinx Spartan-3A Schematic page 16

The DDR2 SDRAM interface has specific pin assignment
and layout requirements to support the Xilinx Memory
Interface Generator (MIG) software. See the "DDR SDRAM"
chapter in UG334: Spartan-3A/3AN Starter Kit User Guide.
TM
Spartan-3A/3AN Starter Kit Board
DDR2 SDRAM Termination Network (2 of 2)