Table of Contents
Advertisement
9 PROGRAM EXAMPLES
M
M
118
1st
M
1A0
station
M
1C0
M
2C0
M
3C0
M
4D8
2nd
M
560
station
M
580
M
680
M
780
M
898
3rd
M
920
station
M
940
M
A40
(2) Buffer memory configuration
The buffer memory configuration for this program example is shown below.
Master station buffer memory
(Automatic update buffer (bank 2))
Initialization area
0
to 19F
H
H
Transmission area 1)
to 19F
H
H
Status storage area
to 1BF
H
H
Transmission area 2)
to 2BF
H
H
Reception area
to 3BF
H
H
Initialization area
to 55F
H
H
Transmission area 1)
to 55F
H
H
Status storage area
to 57F
H
H
Transmission area 2)
to 67F
H
H
Reception area
to 77F
H
H
to 91F
H
H
Initialization area
to 91F
Transmission area 1)
H
H
to 93F
Status storage area
H
H
to A3F
Transmission area 2)
H
H
to B3F
Reception area
H
H
R2 buffer memory (1st station)
Transmission area 1) (88
Status storage area (20
Transmission area 2) (100
R2 buffer memory (2nd station)
Transmission area 1) (88
Status storage area (20
Transmission area 2) (100
R2 buffer memory (3rd station)
Transmission area 1) (88
Status storage area (20
Transmission area 2) (100
9 - 16
MELSEC-A
Initialization area (1A0
worth)
H
worth)
H
worth)
H
worth)
H
Reception area (100
worth)
H
Initialization area (1A0
worth)
H
worth)
H
worth)
H
worth)
H
Reception area (100
worth)
H
Initialization area (1A0
worth)
H
worth)
H
worth)
H
worth)
H
Reception area (100
worth)
H
R2
0
to 19F
H
H
R2 118
to 19F
H
H
R2 1A0
to 1BF
H
H
R2 200
to 2FF
H
H
R2 300
to 3FF
H
H
R2
0
to 19F
H
H
R2 118
to 19F
H
H
R2 1A0
to 1BF
H
H
R2 200
to 2FF
H
H
R2 300
to 3FF
H
H
R2
0
to 19F
H
H
R2 118
to 19F
H
H
R2 1A0
to 1BF
H
H
R2 200
to 2FF
H
H
R2 300
to 3FF
H
H
Advertisement
Table of Contents
Troubleshooting
