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BSL Architecture
* - GPIO pin to be used as 'BSL Invoke' and 'Expected Pin Level' can be configured in BSL configuration
** - T_start refers to the Cold boot startup time, specified in the device specific data sheet
If pin based BSL invocation is enabled, the configured GPIO pin should be either pulled high or low. It
should not be left floating, which could cause unexpected BSL execution.
3.2.4 Debug Mailbox Command
When debug interface is available, Bootloader invocation command can be sent through the Debug Subsystem
Mailbox (DSSM).
For more details on the DSSM command usage, please refer to
commands section.
3.2.5 Others
3.2.5.1 Pre-Boot Application Verification
In the BCR configuration, if application CRC verification is enabled TRM, the bootcode verifies the CRC for the
given application memory range. If the CRC is incorrect, the bootloader is invoked. In this case the bootloader is
invoked only if enabled. Otherwise the bootcode logs a catastrophic error and causes boot failure.
3.3 Memory
3.3.1 SRAM Memory Usage
The SRAM Memory layout explains the memory used for bootloader's operation.
•
Data and Stack section - Used by BSL for it's operation. While exiting the bootloader, these sections of the
SRAM are cleared.
•
Variable Buffer Space - Buffer space used for storing the data packets received /sent during the BSL
communication
The SRAM memory allowed for read and write access by the host is BSL Buffer Start Address to [SRAM end
address - 0x120], where SRAM end address is determined by the SRAM memory available in each device.
Since the same SRAM space is shared with variable buffer space, it has chances of getting overwritten during
an SRAM write/read operation.
6
MSPM0 Bootloader
Figure 3-2. Invocation From GPIO
Note
Copyright © 2023 Texas Instruments Incorporated
MSPM0x_Technical_Reference_Manual
www.ti.com
DSSM
SLAU887 – FEBRUARY 2023
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