Technical Specifications - DIGITAL-LOGIC SmartCore Express SMA200 Technical User's Manual

DIGITAL-LOGIC AG

2.2. Technical Specifications

CPU
CoreDuo / Celeron M
Clock
st
1 Level Cache
nd
2 Level Cache
Technology
VCCCore @ 1.6GHz
VCCCore @ 1.1GHz
VCCCore @ deep sleep
CPU BUS
AGTL+ Termination
FSB
Mathematics Coprocessor
Intel US15W Graphics Memory Controller Hub
Memory Controller
Supports
Socket
Technologies
Capacity
Voltage
Termination
Width
ECC-Support
Intel US15W Graphics Memory Controller Hub
Graphic Controller
Max. Video Memory
Graphic Core Frequency
SDVO Port
Flat Panel Interface
LVDS 24bit
Specification
Intel Atom 510
Intel Atom 530
1.1 or 1.6GHz
2x 32kByte
0.54 MByte (on die)
40nm
1.050V
0.844V
0.748V
CMOS
Not needed
533MHz quad-pumped synchronous BUS
Available on the Atom CPU
Specification
DDR2 soldered memory
DDR2-667
512MByte up to 2GByte
1.8V
0.9V
64bit
No
Specification
128MByte with Intel GMA
250MHz
2 channels (multiplexed with the PEG signals)
1x 200 Mpixel/sec
Support for up to 1x DVI, 1x VGA and 1x LVDS
Dotclock = 165MHz
Compliant with DVI Spec.1.5
2 channel LVDS interface
1x 18, 2x 18, 1x 24, 2x 24bpp TFT
Dotclock = up to 2x 112 MHz
Resolutions 640 x 480 up to 1600 x 1200 (UXGA)
Automatic panel detection via VESA EDID 1.3
200Mpixel/sec
12
1.10GHz with 0.5MB L2-cache
1.60GHz with 0.5MB L2-cache
SMA200 Manual V1.0