Renesas IDT 89EBPES48H12G2 Manual
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Renesas IDT 89EBPES48H12G2 Manual

Renesas IDT 89EBPES48H12G2 Manual

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®
IDT
89EBPES48H12G2
®
Evaluation Board Manual
(Eval Board: 18-677-000)
May 2009
6024 Silver Creek Valley Road, San Jose, California 95138
Telephone: (800) 345-7015 • (408) 284-8200 • FAX: (408) 284-2775
Printed in U.S.A.
©2009 Integrated Device Technology, Inc.

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Summary of Contents for Renesas IDT 89EBPES48H12G2

  • Page 1 ® 89EBPES48H12G2 ® Evaluation Board Manual (Eval Board: 18-677-000) May 2009 6024 Silver Creek Valley Road, San Jose, California 95138 Telephone: (800) 345-7015 • (408) 284-8200 • FAX: (408) 284-2775 Printed in U.S.A. ©2009 Integrated Device Technology, Inc.
  • Page 2 DISCLAIMER Integrated Device Technology, Inc. reserves the right to make changes to its products or specifications at any time, without notice, in order to improve design or performance and to supply the best possible product. IDT does not assume any responsibility for use of any circuitry described other than the circuitry embodied in an IDT product. The Company makes no representations that circuitry described herein is free from patent infringement or other rights of third parties which may result from its use.

  • Page 3: Table Of Contents

    Table of Contents ® Description of the EB48H12G2 Eval Board Notes Introduction ............................. 1-1 Board Features ..........................1-2 Hardware ..........................1-2 Software..........................1-2 Other............................1-2 Revision History ..........................1-2 Installation of the EB48H12G2 Eval Board EB48H12G2 Installation........................2-1 Hardware Description ........................2-1 Reference Clocks..........................
  • Page 4 IDT Table of Contents Notes EB48H12G2 Eval Board Manual May 7, 2009...
  • Page 5 List of Tables ® Table 2.1 Clock Source Selection ....................... 2-1 Notes Table 2.2 SMA Connectors - Onboard Reference Clock ..............2-2 Table 2.3 External Power Connector - J4 ................... 2-2 Table 2.4 Downstream Reset Selection ..................... 2-4 Table 2.5 Boot Configuration Vector Signals ..................
  • Page 6 IDT List of Tables Notes EB48H12G2 Eval Board Manual May 7, 2009...
  • Page 7 List of Figures ® Figure 1.1 Function Block Diagram of the EB48H12G2 Eval Board ...........1-1 Notes EB48H12G2 Eval Board Manual May 7, 2009...
  • Page 8 IDT List of Figures Notes EB48H12G2 Eval Board Manual May 7, 2009...

  • Page 9: Description Of The Eb48H12G2 Eval Board

    Chapter 1 Description of the EB48H12G2 Eval Board ® Introduction Notes The 89HPES48H12G2 switch (also referred to as PES48H12G2 in this manual) is a member of IDT’s PCI Express® standard based line of products. It is a PCIe® Base Specification 2.0 compliant (Gen2) 12- port switch.

  • Page 10: Board Features

    IDT Description of the EB48H12G2 Eval Board Board Features Notes Hardware PES48H12G2 PCIe Gen2 switch – Up to twelve x4 or six x8 ports - 48 PCIe lanes – PCIe Base Specification Revision 2.0 compliant (Gen2 SerDes speeds of 5 GT/S) –...
  • Page 11 IDT Description of the EB48H12G2 Eval Board Notes May 7, 2009: On page 2-2, changed reference to 25MHz oscillator (Y1) to (X1). In PCI Express Analog Power Voltage Converter section, changed DC-DC Converter (U4) to (U14). In PCI Express Transmitter Analog Power Voltage Converter section, changed DC-DC converter (U14) to (U4).
  • Page 12 IDT Description of the EB48H12G2 Eval Board Notes EB48H12G2 Eval Board Manual 1 - 4 May 7, 2009...

  • Page 13: Installation Of The Eb48H12G2 Eval Board

    Chapter 2 Installation of the EB48H12G2 Eval Board ® EB48H12G2 Installation Notes This chapter discusses the steps required to configure and install the EB48H12G2 evaluation board. All available DIP switches and jumper configurations are explained in detail. The primary installation steps are: 1.

  • Page 14: Power Sources

    IDT Installation of the EB48H12G2 Eval Board Notes The source for the onboard clock is the ICS841484 clock generator device (U10) connected to a 25MHz oscillator (X1). When using the onboard clock generator, the output frequency is fixed at 100MHz, therefore FSEL0 (S2, pin 2) should be in the ON position as the default setting.

  • Page 15: 2.5V I/O Voltage Regulator

    IDT Installation of the EB48H12G2 Eval Board 2.5V I/O Voltage Regulator Notes This evaluation board can be stuffed to host the PES48H12G2 (PCIe Gen2) device or the PES48H12 (PCIe Gen1) device. Depending on which device is populated on the board, appropriate settings can be made.

  • Page 16: Boot Configuration Vector

    IDT Installation of the EB48H12G2 Eval Board Notes Port # Jumper Selection [1-2] Software controlled reset through I/O Expander 0 [2-3] Fundamental reset PERST# (default) [1-2] Software controlled reset through I/O Expander 2 [2-3] Fundamental reset PERST# (default) [1-2] Software controlled reset through I/O Expander 2 [2-3] Fundamental reset PERST# (default) [1-2] Software controlled reset through I/O Expander 4 [2-3] Fundamental reset PERST# (default)

  • Page 17: Smbus Interfaces

    IDT Installation of the EB48H12G2 Eval Board Notes Signal Description Default S13[1] CLKMODE2 S13[2] CLKMODE1/CCLKDS S13[3] CLKMODE0/CCLKUS S3[1] SWMODE[0] S3[2] SWMODE[1] S3[3] SWMODE[2] S3[4] SWMODE[3] Table 2.6 Boot Configuration Vector Switches S3 & S13 (ON=0, OFF=1) SMBus Interfaces The System Management Bus (SMBus) is a two-wire interface through which various system compo- nent chips can communicate.

  • Page 18: Smbus Master Interface

    IDT Installation of the EB48H12G2 Eval Board SMBus Master Interface Notes Connected to the master SMBus interface are seven 16-bit I/O Expanders (MAX7311) and a serial EEPROM (24LC512). Six I/O Expanders are used as the interface for the onboard hot-plug controllers (MIC2591B).

  • Page 19: Miscellaneous Jumpers, Headers

    IDT Installation of the EB48H12G2 Eval Board Miscellaneous Jumpers, Headers Notes Miscellaneous Jumpers, Headers Ref. Type Default Description Designator W1-W3 Header 1-2 Shunted 1-2: 12.0V source from Upstream Port (Default) 2-3: 12.0V source from external power connector Header Shunted Disable EEPROM Write protect feature (Default) S9[1] Switch ON: Port2, Force hot-plug controller on (Default)

  • Page 20: Leds

    IDT Installation of the EB48H12G2 Eval Board LEDs Notes There are several LED indicators on the EB48H12G2 which convey status feedback. A description of each is provided in Table 2.11. Location Color Definition DS14 Green Port 2: Power-is-good Indicator DS20 Green Port 4: Power-is-good Indicator DS17...

  • Page 21: Pci Express Connectors

    IDT Installation of the EB48H12G2 Eval Board PCI Express Connectors Notes Side A Side B +12V 12V power PRSNT1# Hot-Plug presence detect +12V 12V power +12V 12V power RSVD Reserved +12V 12V power Ground Ground SMCLK SMBus clock JTAG2 TCK (Test Clock) JTAG i/f clk i/p SMDAT SMBus Data JTAG...
  • Page 22 IDT Installation of the EB48H12G2 Eval Board Notes Side A Side B PETn4 pair, Lane 4 Ground Ground PERp4 Receiver differential Ground PERn4 pair, Lane 4 PETp5 Transmitter differential Ground PETn5 pair, Lane 5 Ground Ground PERp5 Receiver differential Ground PERn5 pair, Lane 5 PETp6...

  • Page 23: Eb48H12G2 Board Figure

    IDT Installation of the EB48H12G2 Eval Board EB48H12G2 Board Figure Notes EB48H12G2 Eval Board Manual 2 - 11 May 7, 2009...
  • Page 24 IDT Installation of the EB48H12G2 Eval Board EB48H12G2 Eval Board Manual 2 - 12 May 7, 2009...

  • Page 25: Software For The Eb48H12G2 Eval Board

    Chapter 3 Software for the EB48H12G2 Eval Board ® Introduction Notes This chapter discusses some of the main features of the available software to give users a better under- standing of what can be achieved with the EB48H12G2 evaluation board using the device management software.
  • Page 26 IDT Software for the EB48H12G2 Eval Board Notes EB48H12G2 Eval Board Manual 3 - 2 May 7, 2009...

  • Page 27: Schematics

    Chapter 4 Schematics ® Schematics Notes EB48H12G2 Eval Board Manual 4 - 1 May 7, 2009...
  • Page 28 REVISIONS DESCRIPTION DATE CHANGE BY PCB-0171R01 89EBPES48H12G2 EVAL BOARD JULY 31 2008 P02_TOP_LEVEL_BLOCK_DIAGRAM TITLE 89HPES48H12G2 Eval Board SIZE DRAWING NO. FAB P/N REV. SCH-00172 18-677-000 AUTHOR CHECKED BY CONFIDENTIAL PROPERTY OF INTEGRATED DEVICE TECHNOLOGY, INC. B.Le 6024 SILVER CREEK VALLEY RD. SAN JOSE, CA 95138 2008 COPYRIGHT (C) Tue Sep 23 14:23:33 2008...
  • Page 29 IOEXP_ATTN P2_PDN P2_PDN P2_PDN P4_PDN P4_PDN P4_PDN P6_PDN PAGE 20 P6_PDN P6_PDN P8_PDN P8_PDN P8_PDN P2_PFN P2_PFN P2_PFN P4_PFN P4_PFN P4_PFN P6_PFN P6_PFN P6_PFN P8_PFN P8_PFN P8_PFN P2_PEP P2_PEP P2_PEP P4_PEP P4_PEP P4_PEP P6_PEP P6_PEP P6_PEP P8_PEP P8_PEP P8_PEP M_P2_PERST_N M_P2_PERST_N M_P2_PERST_N M_P4_PERST_N...
  • Page 30 DUT_CONTROL_MISC P0CLKP 4C5v 2B6^ P0CLKP P0CLKN M_PERSTN 4C5v 2B6^ 2B6^ 4C5v P0CLKN M_PERSTN P2CLKP M_SCL 4C5v 2B6^ 2B6^ 4A6v P2CLKP M_SCL P2CLKN M_SDA PAGE 4 4C5v 2B6^ 2B6^ 4A6v P2CLKN M_SDA PEREFCLKP3 M_SSMBCLK 4D5v 2B5^ 2B6^ 4B2v PEREFCLKP3 M_SSMBCLK PEREFCLKN3 M_SSMBDAT 4D5v 2B5^ 2B6^...
  • Page 31 DUT_VDD_IO DUT_VDD_IO 3_3V SILKSCREEN LABEL: R175 R186 SWITCH S13 R231 SM_SW4 DESCRIPTION ------------------- CLKMODE_2 VSS_CLKMODE2 CLKMODE_2 CLKMODE_1 R135 CCLKDS_CLKMODE1 GPIO31_VSS CLKMODE_1 CLKMODE_0 R136 CCLKUS_CLKMODE0 GPIO30_VSS CLKMODE_0 R137 GPIO29_VSS MSMBADDR1 SPARE R138 MSMBADDR1_VSS_075 GPIO28_VSS ------------------- R139 MSMBCLK GPIO27_VSS R140 MSMBDAT GPIO16_VSS R141 GPIO12_VSS_017 PEREFCLKP3...
  • Page 32 UPSTREAM PORTS P0_PERP<3:0> P0_PERP<3> AC_P0_PETP3 P0_PETP<3:0> 0.1UF C136 P0_PETP<3> 3C7^ 3C7^ PE00RN3 PE00TP3 P0_PERN<3> AC_P0_PETN3 0.1UF C120 P0_PETN<3> PE00RP3 PE00TN3 P0_PERP<2> AC_P0_PETP2 0.1UF C137 P0_PETP<2> PE00RN2 PE00TP2 AC_P0_PETN2 P0_PERN<2> 0.1UF C121 P0_PETN<2> PE00RP2 PE00TN2 P0_PERP<1> AC_P0_PETP1 0.1UF C138 P0_PETP<1> PE00RN1 PE00TP1 P0_PERN<1>...
  • Page 33 DUT_VDDPEA DUT_VDDPEHA DUT_VDD_IO DUT_VDDPETA DUT_VDDCORE VDDCORE_00 VDDCORE_01 VDDCORE_02 VDDCORE_03 DUT_VDDPEA VDDCORE_04 VDDCORE_05 VDDCORE_06 AA10 VDDCORE_07 VDDPEA_00 AA17 VDDCORE_08 VDDPEA_01 VDDCORE_09 VDDPEA_02 VDDCORE_10 VDDPEA_03 VDDCORE_11 VDDPEA_04 VDDCORE_12 VDDPEA_05 DUT_VDDPEHA VDDCORE_13 VDDPEA_06 VDDCORE_14 VDDPEA_07 VDDCORE_15 VDDPEA_08 VDDCORE_16 VDDPEA_09 VDDCORE_17 VDDPEA_10 VDDCORE_18 VDDPEA_11 VDDCORE_19 VDDPEA_12 VDDCORE_20...
  • Page 34 VSS_260 VSS_000 VSS_130 VSS_001 VSS_131 VSS_002 VSS_132 VSS_003 VSS_133 VSS_004 VSS_134 VSS_005 VSS_135 AA15 VSS_006 VSS_136 AA16 VSS_007 VSS_137 AA20 VSS_008 VSS_138 AA21 VSS_009 VSS_139 AA24 VSS_010 VSS_140 VSS_011 VSS_141 VSS_012 VSS_142 AB11 VSS_013 VSS_143 AB14 VSS_014 VSS_144 AB17 VSS_015 VSS_145 AB20 VSS_016...
  • Page 35 CLOCK_DS_G1REF P0_REFCLKP P2_REFCLKP 2C4^ 2C3^ 9C4v P2_REFCLKP P2_REFCLKN 2C3^ 9C4v P2_REFCLKN P0_REFCLKN 2C4^ P4_REFCLKP 2C3^ 9C4v P4_REFCLKP P4_REFCLKN 2C3^ 9C4v 3_3V P4_REFCLKN PAGE 9 P6_REFCLKP 2B3^ 9C4v P6_REFCLKP P6_REFCLKN 2B3^ 9C4v PLACE NEAR U5 P6_REFCLKN 120OHM P8_REFCLKP 2B3^ 9C4v P8_REFCLKP 400MA P8_REFCLKN 2B3^ 9B4v...
  • Page 36 3_3V 600OHM R255 R256 500MA ICS9DB803 VDDA REFIN_CLKP SRC_IN DIF_0 SR_P2_CLKP P2_REFCLKP 8C3^ 8D2^ REFIN_CLKN SR_P2_CLKN P2_REFCLKN 8C3^ SRC_IN# DIF_0# 8D2^ R235 P2_PWRGDN OE0# DIF_1 SR_P8_CLKP P8_REFCLKP 8C3^ 8C2^ SR_P8_CLKN R236 P8_REFCLKN DIF_1# 8C2^ P6_PWRGDN 8C3^ OE1# SR_P4_CLKP P4_REFCLKP DIF_2 8D2^ P4_PWRGDN SR_P4_CLKN...
  • Page 37 CONNSMA 221789-3 3_3V CONNSMA 600OHM 500MA 221789-3 CONNSMA 221789-3 CONNSMA ICS9DB803 VDDA G2_REFIN_CLKP SRC_IN DIF_0 8B3^ G2_REFIN_CLKN 8B3^ SRC_IN# DIF_0# 221789-3 R267 CONNSMA OE0# DIF_1 R268 DIF_1# OE1# DIF_2 OE2# DIF_2# OE3# DIF_3 DIF_3# 221789-3 OE4# CONNSMA DIF_4 OE_INV=1 OE5# DIF_4# R269 OE6#...
  • Page 38 3_3VAUX P0_3_3V 12_0V 12_0V P0_3_3V 3_3V SILKSCREEN LABEL: SWITCH J8 R158 DESCRIPTION R159 ------------------- PCIE_ADD_ON_PRESENT_N SMBDATA SMBCLK PCIe x8 EDGE ------------------- +12V PRSTN1# +12V +12V RSVD +12V PORT AND LANE ASSIGNMENT SHOUD BE VERIFIED R160 M_SSMBCLK 2B7^ SMCLK JTAG_TCK M_SSMBDATA R161 2B7^ SMDAT...
  • Page 39 M_SSMBCLK 16C6v 15C6v 14D6v 13D6v 2B1^ M_SSMBCLK M_SSMBDATA 16C6v 15C6v 14C6v 13D6v 2B1^ M_SSMBDATA P2_REFCLKP 13C4v 2C1^ P2_REFCLKP P2_REFCLKN 13C4v 2C1^ P2_REFCLKN P2_PDN 13D5v 2D1^ P2_PDN P2_WAKE_N PAGE 13 13D5v 2A1^ P2_WAKE_N M_PERSTN 16C4v 15C4v 14C4v 13C3v 2B1^ M_PERSTN M_P2_PERST_N 13C3v 2D1^ M_P2_PERST_N...
  • Page 40 P2_12V P2_3_3V P2_PCIE_3_3AUX P2_12V P2_3_3V PCIe x8 SOCKET +12V PRSTN1# +12V +12V RSVD +12V M_SSMBCLK 12D6^ SMCLK JTAG_TCK M_SSMBDATA 12D6^ SMDAT JTAG_TDI JTAG_TDO +3.3V JTAG_TMS JTAG_TRSTN +3.3V M_P2_PERST_N 12D6^ 3.3VAUX +3.3V P2_WAKE_N P2_PERST_N 12D6^ WAKE# PERST# M_PERSTN 12D6^ RSVD P2_REFCLKP REFCLK+ 12D6^ P2_PETP<7:0>...
  • Page 41 P6_12V P6_3_3V DS22 P6_PCIE_3_3AUX P6_12V P6_3_3V PCIe x8 SOCKET R151 +12V PRSTN1# +12V +12V RSVD +12V M_SSMBCLK R149 12C6^ SMCLK JTAG_TCK M_SSMBDATA R150 12C6^ SMDAT JTAG_TDI JTAG_TDO +3.3V JTAG_TMS JTAG_TRSTN +3.3V M_P6_PERST_N 12C6^ 3.3VAUX +3.3V P6_WAKE_N P6_PERST_N 12C6^ WAKE# PERST# M_PERSTN 12C6^ RSVD...
  • Page 42 P4_12V P4_3_3V P4_PCIE_3_3AUX P4_12V P4_3_3V PCIe x8 SOCKET +12V PRSTN1# +12V +12V RSVD +12V M_SSMBCLK 12C6^ SMCLK JTAG_TCK M_SSMBDATA 12C6^ SMDAT JTAG_TDI JTAG_TDO +3.3V JTAG_TMS JTAG_TRSTN +3.3V M_P4_PERST_N 12B6^ 3.3VAUX +3.3V P4_WAKE_N P4_PERST_N 12B6^ WAKE# PERST# M_PERSTN 12B6^ RSVD P4_REFCLKP 12B6^ REFCLK+ P4_PETP<7:0>...
  • Page 43 P8_12V P8_3_3V P8_PCIE_3_3AUX P8_12V P8_3_3V PCIe x8 SOCKET +12V PRSTN1# +12V +12V RSVD +12V M_SSMBCLK 12B6^ SMCLK JTAG_TCK M_SSMBDATA 12B6^ SMDAT JTAG_TDI JTAG_TDO +3.3V JTAG_TMS JTAG_TRSTN +3.3V M_P8_PERST_N 3.3VAUX +3.3V 12B6^ P8_WAKE_N P8_PERST_N 12B6^ WAKE# PERST# M_PERSTN 12B6^ RSVD P8_REFCLKP 12B6^ REFCLK+ P8_PETP<3:0>...
  • Page 44 3_3VAUX 3_3V P2_PCIE_3_3AUX 3_3VAUX 3_3V 12V_DS 3_3VAUX MIC2591B 12V_DS P2_12V P2_VAUX VSTBYA VAUXA VSTBYB P28_INTN R211 0.020 12VINA IREF P2_12VSENSE 12VSENSEA RFILTER P2_12VGATE 12VGATEA CFILTERA 0.022UF P2_12VOUT CFILTERB 12VOUTA R127 FORCE_ONA_N PMOSFET FORCE_ONB_N 3VINA GPI_A0 P2_3VSENSE 6800PF C342 GPI_B0 3VSENSEA 3_3V P2_3_3V P2_3VGATE...
  • Page 45 3_3V 3_3VAUX P4_PCIE_3_3AUX 3_3VAUX 3_3V 12V_DS 3_3VAUX MIC2591B 12V_DS P4_12V P4_VAUX VSTBYA VAUXA VSTBYB P64_INTN R220 0.020 12VINA IREF P4_12VSENSE 12VSENSEA RFILTER P4_12VGATE 12VGATEA CFILTERA 0.022UF P4_12VOUT CFILTERB 12VOUTA FORCE_ONA_N PMOSFET FORCE_ONB_N 3VINA GPI_A0 P4_3VSENSE 6800PF C345 GPI_B0 3VSENSEA 3_3V P4_3_3V P4_3VGATE 3VGATEA...
  • Page 46 3_3VAUX 3_3VAUX SN74LVC1G125 P8_WAKE_N R132 2A3^ OE_N TP16 P0_WAKE_N R131 2A4^ 3_3VAUX SN74LVC1G125 P4_WAKE_N 2A3^ OE_N SN74LVC1G125 P6_WAKE_N 2A3^ OE_N SN74LVC1G125 P2_WAKE_N 2A3^ OE_N 89HPES48H12G2 Eval Board TITLE PORT WAKE BUFFER SIZE DRAWING NO. FAB P/N REV. SCH-00172 18-677-000 AUTHOR CHECKED BY CONFIDENTIAL PROPERTY OF INTEGRATED DEVICE TECHNOLOGY, INC.
  • Page 47 DUT_VDD_IO DUT_VDD_IO DUT_VDD_IO DUT_VDD_IO DUT_VDD_IO DUT_VDD_IO PLACE LED NEAR ASSIGNED PORT PLACE LED NEAR ASSIGNED PORT MAX7311AUG MAX7311AUG P0LINKUPN R170 P0 LINKUP P0ACTIVEN DS27 R177 P0 ACT P1LINKUPN R171 P2 LINKUP P1ACTIVEN DS28 R178 P2 ACT SM0402 SM0402 P2LINKUPN DS10 R172 P4 LINKUP P2ACTIVEN...
  • Page 48 DUT_VDD_IO DUT_VDD_IO DUT_VDD_IO DUT_VDD_IO DUT_VDD_IO R283 MAX7311AUG MAX7311AUG P4APN P4_PDN PB_SW 20B7^ P4_PFN 20B7^ SM0402 SM0402 W58 3 P4_PWRGDN 20B7^ P4_AIN SHLD1 20B7^ SM0402 SM0402 P4_PIN 20B7^ SHLD2 P4_PEP 20B7^ SM0402 SM0402 M_P4_PERST_N PORT 2 ATTN 20B7^ P2APN P6APN P2_PDN P6_PDN 20B7^ 20B7^...
  • Page 49 SILKSCREEN TABLE 3_3V 3_3V 3_3V _____________________ RESET SELECT POWER INDICATOR --------------------- PLACE NEAR TOP EDGE ON BOARD CIRCUIT LABEL 'POWER' --------------------- 3_3V EDGE CONNECTOR --------------------- BOARD RESET SN74LVC1G125 PERST_N 2B8^ OE_N M_PERSTN 2B7^ PERST_N 2B8^ TLC7733D LABEL 'GND' RESINN TP38 SENSE RESET CONTROL...
  • Page 50 +12.0V -> +2.5V 12V_DS R265 2_5V 2_5V 2_5V NOISE-FREE ROUTING FOR "VDDTA" DUT_VDDPEA VDDTA, 1.0V 3_3V VO_SEN+ MIC49500WR Track Vout VDDTA R310 SYNC VOUT R311 TURBOTRANS VO_SEN- VBIAS TP55 R312 Inhibit TP56 R313 GND2 Vo_Adj GND1 PTH08T240WAD ADJ/VSNS 2_5V NOISE-FREE ROUTING FOR "VDDCORE" VDDCORE, 1.0V 3_3V DUT_VDDCORE...
  • Page 51 Renesas' products are provided only subject to Renesas' Terms and Conditions of Sale or other applicable terms agreed to in writing. No use o any Renesas resources expands or otherwise alters any applicable warranties or warranty disclaimers for these products.

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