Motorola MVME2600 Series Programmer's Reference Manual page 9

MPC Slave Address (3) Register 2-40
MPC Slave Offset/Attribute (0,1 and 2) Registers 2-41
MPC Slave Offset/Attribute (3) Registers 2-42
General Purpose Registers 2-43
PCI Registers 2-43
Vendor ID/ Device ID Registers 2-45
PCI Command/ Status Registers 2-45
Revision ID/ Class Code Registers 2-47
I/O Base Register 2-48
Memory Base Register 2-49
PCI Slave Address (0,1,2 and 3) Registers 2-50
PCI Slave Attribute/ Offset (0,1,2 and 3) Registers 2-51
CONFIG_ADDRESS 2-52
PCI I/O CONFIG_ADDRESS Register 2-52
PCI I/O CONFIG_DATA Register 2-54
Raven Interrupt Controller Implementation 2-55
Introduction 2-55
The Raven Interrupt Controller (RavenMPIC) Features 2-55
Architecture 2-55
CSRÕs Readability 2-56
Interrupt Source Priority 2-56
ProcessorÕs Current Task Priority 2-56
Nesting of Interrupt Events 2-56
Spurious Vector Generation 2-57
Interprocessor Interrupts (IPI) 2-57
8259 Compatibility 2-57
Raven-Detected Errors 2-58
Timers 2-58
Interrupt Delivery Modes 2-58
Block Diagram Description 2-60
Program Visible Registers 2-61
Interrupt Pending Register (IPR) 2-61
Interrupt Selector (IS) 2-61
Interrupt Request Register (IRR) 2-62
In-Service Register (ISR) 2-62
Interrupt Router 2-62
MPIC Registers 2-64
RavenMPIC Registers 2-64
Feature Reporting Register 2-69
Global Configuration Register 2-70
Vendor Identification Register 2-71
Processor Init Register 2-71