Boards Settings; Setting The Base Address Through Dip Switsches - Addi-Data ADDINUM PA 1500 Technical Description

Settings of the board
5.1.2

Boards settings

i
IMPORTANT!
J1-A. It means that jumper J1 is set in position A .
J1 Selection of the time base for the timers or the watchdog.
Timer: 111.5 kHz ± 1 %
J1-A
Watchdog: 8.94 µs to 586 ms
Settings at delivery
Timer: 3.45 kHz ± 1 %
J1-B
Watchdog: 286.6 µs to 18.76 s
Timer: 1.75 kHz ± 1 %
J1-C
Watchdog: 573.2 µs to 37.52 s
J2 Address decoding logic
J2-A Address bit A13, decoded to 0
J2-B Address bit A14, decoded to 0
J2-C Address bit A15, decoded to 0
All positions are set at delivery (J2-A to J2-C)
J3 Selection of the data bus width
J3 set 16-bit data bus access on the addresses Base +0, Base +2
J3 open 8-bit data bus access on the addresses Base +0, Base +2
J4 Selection of an interrupt line to the PC bus
No interrupt line is selected at delivery.
i
IMPORTANT!
IRQ 10 is almost always free on the PC.
5.1.3 Setting the base address through DIP switches
WARNING!
If the base address set is wrong, the board and/or the PC may be destroyed
At delivery the base address is set to 0390H.
♦ Check if the base address is free on your PC.
♦ Check if the required address range is not already used by the PC or
by another inserted board.
18
PA 1500