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The Texas Instruments LP592201EVM evaluation module (EVM) helps designers evaluate the operation
and performance of the adjustable LP592201 LDO voltage regulator. The LP592201EVM contains one
LP592201DSC LDO adjustable voltage regulator, programmed to have an output voltage of 1.8 V, in the
WSON (DSC) package (see
EVM ORDERABLE NUMBER
LP592201EVM
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1
1.1
1.2
1.3
1.4
2
3
4
LP592201EVM Schematic
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Bill of Materials
1
EN Jumper Settings
2
LP592201EVM Setup
3
4
5
6
7
8
1
Device Information
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2
Trademarks
All trademarks are the property of their respective owners.
SNVU532 - November 2016
Submit Documentation Feedback
Table
1).
Table 1. Device Information
V
1.8 V
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Copyright © 2016, Texas Instruments Incorporated
LP592201EVM User Guide
PART NAME
LP592201DSC
Contents
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List of Figures
List of Tables
User's Guide
SNVU532 - November 2016
PACKAGE
10-pin / WSON / DSC
LP592201EVM User Guide
2
2
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8
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Summary of Contents for Texas Instruments LP592201EVM

  • Page 1: Table Of Contents

    The Texas Instruments LP592201EVM evaluation module (EVM) helps designers evaluate the operation and performance of the adjustable LP592201 LDO voltage regulator. The LP592201EVM contains one LP592201DSC LDO adjustable voltage regulator, programmed to have an output voltage of 1.8 V, in the...
  • Page 2: Setup

    (Output disabled) Figure 1. EN Jumper Settings Setup The recommended operating input voltage range for the LP592201EVM is V + 0.5 V (minimum) to 6 V (maximum). A load should be applied between the OUT terminal and the GNDOUT terminal for proper operation. Load current should be maintained between 1 mA and 2 A.
  • Page 3 + 0.59 • 9 • 6.0V VOUT Output Load 2A MAX GNDOUT GNDIN DMM ± Power Good status at TPpg Figure 2. LP592201EVM Setup SNVU532 – November 2016 LP592201EVM User Guide Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated...
  • Page 4: Operation

    Setup www.ti.com Operation For proper operation of the LP592201EVM, the J3 terminals must be properly configured. The recommended jumper setting is: J3 shunt is across the center and ON pins. In this configuration, the device powers up when power is applied at the IN terminal.
  • Page 5: Board Layout

    Figure 3 through Figure 8 show the board layout for the LP592201EVM PCB. The EVM offers resistors R1 and R2 to set the output voltage, resistor Rpg for pull-up of the PG pin, a C capacitor to enhance phase margin, capacitors C1 and C2 to add additional capacitance to the input and output, and J3 3-pin terminal to set the EN pin status.
  • Page 6: Layer 2: Gnd Plane

    Figure 5. Layer 2: GND Plane Figure 6. Layer 3: GND Plane Figure 7. Bottom-Layer Routing Figure 8. Bottom Assembly Layer and Silk-Screen LP592201EVM User Guide SNVU532 – November 2016 Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated...
  • Page 7 LP592201EVM Schematic www.ti.com LP592201EVM Schematic SNVU532 – November 2016 LP592201EVM User Guide Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated...
  • Page 8: Vout

    Terminal, Turret, Through-Hole, Double Keystone 1502-2 (2.29 mm) TPss/nr, TPvin, TPvout IC LDO: Adjustable DSC010 LP592201DSC LP592201EVM PCB PCB, 2 inch × 2 inch × 0.062 SV601261 LP592201EVM User Guide SNVU532 – November 2016 Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated...
  • Page 9 STANDARD TERMS AND CONDITIONS FOR EVALUATION MODULES Delivery: TI delivers TI evaluation boards, kits, or modules, including demonstration software, components, and/or documentation which may be provided together or separately (collectively, an “EVM” or “EVMs”) to the User (“User”) in accordance with the terms and conditions set forth herein.
  • Page 10 FCC Interference Statement for Class B EVM devices NOTE: This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation.
  • Page 11 【無線電波を送信する製品の開発キットをお使いになる際の注意事項】 開発キットの中には技術基準適合証明を受けて いないものがあります。 技術適合証明を受けていないもののご使用に際しては、電波法遵守のため、以下のいずれかの 措置を取っていただく必要がありますのでご注意ください。 1. 電波法施行規則第6条第1項第1号に基づく平成18年3月28日総務省告示第173号で定められた電波暗室等の試験設備でご使用 いただく。 2. 実験局の免許を取得後ご使用いただく。 3. 技術基準適合証明を取得後ご使用いただく。 なお、本製品は、上記の「ご使用にあたっての注意」を譲渡先、移転先に通知しない限り、譲渡、移転できないものとします。 上記を遵守頂けない場合は、電波法の罰則が適用される可能性があることをご留意ください。 日本テキサス・イ ンスツルメンツ株式会社 東京都新宿区西新宿6丁目24番1号 西新宿三井ビル 3.3.3 Notice for EVMs for Power Line Communication: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page 電力線搬送波通信についての開発キットをお使いになる際の注意事項については、次のところをご覧ください。http:/ /www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page SPACER EVM Use Restrictions and Warnings: 4.1 EVMS ARE NOT FOR USE IN FUNCTIONAL SAFETY AND/OR SAFETY CRITICAL EVALUATIONS, INCLUDING BUT NOT LIMITED TO EVALUATIONS OF LIFE SUPPORT APPLICATIONS.
  • Page 12 Notwithstanding the foregoing, any judgment may be enforced in any United States or foreign court, and TI may seek injunctive relief in any United States or foreign court. Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2016, Texas Instruments Incorporated...
  • Page 13 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue.

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