Address Map B (Chrp); Table 1-3. Processor Address Map B (Chrp) - Motorola MVME2100 Programmer's Reference Manual

Product Data and Memory Maps
1

Address Map B (CHRP)

Processor Address
Start
0000 0000
top_dram
8000 0000
FD00 0000
FE00 0000
FE80 0000
FEC0 0000
FEE0 0000
FEF0 0000
FF00 0000
FF80 0000
FF90 0000
FFA0 0000
FFB0 0000
FFC0 0000
FFD0 0000
FFE0 0000
FFF0 0000
1-6
The system software may initialize the processor to use Address Map B.
The following table shows the recommended CHRP Memory Map from
the point of view of the Processor.

Table 1-3. Processor Address Map B (CHRP)

Size
End
top_dram dram_size
7FFF FFFF 2G - dram_size
FCFF FFFF 2G - 48M
FDFF FFFF 16M
FE7F FFFF 8M
FEBF FFFF 4M
FEDF FFFF 2M
FEEF FFFF 1M
FEFF FFFF 1M
FF7F FFFF 8M
FF8F FFFF 1M
FF9F FFFF 1M
FFAF FFFF 1M
FFBF FFFF 1M
FFCF FFFF 1M
FFDF FFFF 1M
FFEF FFFF 1M
FFFF FFFF 1M
Definition
System Memory (onboard DRAM)
Reserved
PCI Memory Space
PCI/ISA Memory Space
PCI/ISA I/O Space
PCI I/O Space
PCI Configuration address register
PCI Configuration data register
PCI Interrupt Acknowledge
ROM/FLASH Bank 1
System I/O (Port X replicated)
ROM/FLASH Bank 0 (replicated
System I/O (Port X replicated)
ROM/FLASH Bank 0 (replicated)
System I/O (Port X replicated)
ROM/FLASH Bank 0 (replicated)
System I/O (Port X)
ROM/FLASH Bank 0
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