Technical Description - SeaLevel ULTRA 485+2.PCI User Manual

Technical Description

The Sealevel Systems ULTRA 485+2.PCI provides a PCI interface adapter with 2 asynchronous, field
selectable, RS-422/485 serial ports for industrial automation and control applications.
The ULTRA 485+2.PCI uses the 16850 advanced UART. This chip features programmable baud rates,
data format, interrupt control and a 128-byte input and output FIFO.
Interrupts
A good description of an interrupt and its importance to the IBM PC can be found in the book 'Peter
Norton's Inside the PC, Premier Edition'.
A good analogy of a PC interrupt would be the phone ringing. The phone 'bell' is a request for us to stop
what we are currently doing and take up another task (speak to the person on the other end of the line).
This is the same process the PC uses to alert the CPU that a task must be preformed. The CPU upon
receiving an interrupt makes a record of what the processor was doing at the time and stores this
information on the 'stack'; this allows the processor to resume its predefined duties after the interrupt is
handled, exactly where it left off. Every main sub-system in the PC has it's own interrupt, frequently called
an IRQ (short for Interrupt ReQuest). The following IRQ table will define the system IRQs as well as show
typically free IRQs.
In these early days of PC's Sealevel Systems decided that the ability to share IRQs was an important
feature for any add-in I/O card. Consider that in the IBM XT the available IRQs were IRQ0 through IRQ7. Of
these interrupts only IRQ2-5 and IRQ7 were actually available for use. This made the IRQ a very valuable
system resource. To make the maximum use of these system resources Sealevel Systems devised an
IRQ sharing circuit that allowed more than one port to use a selected IRQ. This worked fine as a hardware
solution but presented the software designer with a challenge to identify the source of the interrupt. The
software designer frequently used a technique referred to as 'round robin polling'. This method required
the interrupt service routine to 'poll' or interrogate each UART as to its interrupt pending status. This
method of polling was sufficient for use with slower speed communications, but as modems increased
their through put abilities this method of servicing shared IRQs became inefficient.
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© Sealevel Systems, Inc. 7204 Manual | SL9061 7/2021