ZiLOG eZ8 User Manual page 215

Table 23. eZ8 CPU Instructions Sorted by Opcode
Opcode(s)
(Hex)
20
21
22
23
24
25
26
27
28
29
2A
2B
2C
2D
2E
2F
30
31
32
33
34
35
36
37
38
39
Flags Notation: * = Value is a function of the result of the operation.
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Address Mode
Assembly Mnemonic dst
INC dst
INC dst IR
SUB dst, src
SUB dst, src
SUB dst, src
SUB dst, src
SUB dst, src
SUB dst, src IR
SUBX dst, src ER
SUBX dst, src ER
DJNZ dst, RA
JR LE, dst DA
LD dst, src
JP LE, dst DA
INC dst
ATM
DEC dst
DEC dst IR
SBC dst, src
SBC dst, src
SBC dst, src
SBC dst, src
SBC dst, src
SBC dst, src IR
SBCX dst, src ER
SBCX dst, src ER
- = Unaffected
X = Undefined
src C Z S
R - *
- *
r r * *
r Ir * *
R R * *
R IR * *
R IM * *
IM * *
ER * *
IM * *
r - -
- -
r IM - -
- -
r - *
- -
R - *
- *
r r * *
r Ir * *
R R * *
R IR * *
R IM * *
IM * *
ER * *
IM * *
User Manual
Flags
Fetch
V D H Cycles
* * - - 2
* * - - 2
* * 1 * 2
* * 1 * 2
* * 1 * 3
* * 1 * 3
* * 1 * 3
* * 1 * 3
* * 1 * 4
* * 1 * 4
- - - - 2
- - - - 2
- - - - 2
- - - - 3
* * - - 1
- - - - 1
* * - - 2
* * - - 2
* * 1 * 2
* * 1 * 2
* * 1 * 3
* * 1 * 3
* * 1 * 3
* * 1 * 3
* * 1 * 4
* * 1 * 4
0 = Reset to 0
1 = Set to 1
Opcodes Listed Numerically
eZ8 CPU
205
Instr.
Cycles
2
3
3
4
3
4
3
4
3
3
3
2
2
2
2
2
2
3
3
4
3
4
3
4
3
3