Supermicro X11DPT-BR User Manual page 78

Super X11DPT-BR User's Manual
CPU P State Control (Available when Power Technology is set to

Custom)
SpeedStep (P-States)
EIST (Enhanced Intel SpeedStep Technology) allows the system to automatically adjust
processor voltage and core frequency in an effort to reduce power consumption and heat
dissipation. Please refer to Intel's website for detailed information. The options are Disable
and Enable.
EIST PSD Function (Available when SpeedStep is set to Enable)
Use this feature to configure the processor's P-State coordination settings. During a P-State,
the voltage and frequency of the processor will be reduced when it is in operation. This
makes the processor more energy efficient, resulting in further energy gains. The options
are HW_ALL, SW_ALL and SW-ANY.
Turbo Mode (Available when SpeedStep is set to Enable)
Select enable to allow the CPU to operate at the manufacturer-defined turbo speed by
increasing CPU clock frequency. This feature is available when it is supported by the CPUs
used in the system. The options are Disable and Enable.
Hardware PM (Power Management) State Control (Available when

"Power Technology" is set to Custom)
Hardware P-States
If this feature is set to Disable, system hardware will choose a P-state setting for the
system based on an OS request. If this feature is set to Native Mode, hardware will choose
a P-state setting based on the OS guidance. If this feature is set to Native Mode with No
Legacy Support, system hardware will choose a P-state setting independently without OS
guidance. The options are Disable, Native Mode, Out of Band Mode, and Native Mode
with No Legacy Support.
CPU C State Control

Autonomous Core C-State
Select Enable to support Autonomous Core C-State control which will allow the processor
core to control its C-State setting automatically and independently. The options are Disable
and Enable.
CPU C6 Report (Available when Autonomous Core C-State is set to Disable)
Select Enable to allow the BIOS to report the CPU C6 state (ACPI C3) to the operating
system. During the CPU C6 state, power to all caches is turned off. The options are Auto,
Enable, and Disable.
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