Retention Domain Control Register (Rcc_Rdctrl) - Nations N32G430 Series User Manual

Bit Field Name
3:0 ADCHPRES[3:0]

Retention Domain Control Register (RCC_RDCTRL)

Address offset: 0x34
Reset value: 0x0000 0000
Bit Field Name
31:11 Reserved
10 LPTIMERRST
Description
10011: PLL clock divided by 6
10100: PLL clock divided by 8
10101: PLL clock divided by 10
10110: PLL clock divided by 12
10111: PLL clock divided by 16
11000: PLL clock divided by 32
11001: PLL clock divided by 64
11010: PLL clock divided by 128
11011: PLL clock divided by 256
Others: PLL clock divided by 256
ADC HCLK prescaler
Set and cleared by software to configure the division factor from the HCLK clock
to the ADC.
0000: HCLK clock not divided
0001: HCLK clock divided by 2
0010: HCLK clock divided by 4
0011: HCLK clock divided by 6
0100: HCLK clock divided by 8
0101: HCLK clock divided by 10
0110: HCLK clock divided by 12
0111: HCLK clock divided by 16
1000: HCLK clock divided by 32
Others: HCLK clock divided by 32
Description
Reserved, the reset value must be maintained.
LPTIMER reset
Set and cleared by software.
0: Clear the reset
1: Reset LPTIMER
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