Figure 9-18 Control Circuit In External Clock Mode 1 - Nations N32G430 Series User Manual

For example, to configure up-counting mode to count on the rising edge of the clock at the T12 input, the
configuration steps are as follows:
 Configure TIMx_CCMOD1.CC2SEL equal to '01', CC2 channel is configured as input, IC2 is mapped to TI2
 Configure TIMx_CCEN.CC2P equal to '0', select clock rising edge polarity

To select input filter bandwidth by configuring TIMx_CCMOD1.IC2F[3:0] (if filter is not needed, keep IC2F
bit at '0000')
 Configure TIMx_SMCTRL.SMSEL equal to '111', select timer external clock mode 1
 Configure TIMx_SMCTRL.TSEL equal to '110', select TI2 as the trigger input source
 Configure TIMx_CTRL1.CNTEN equal to '1' to start the counter
Note: The capture prescaler is not used for triggering, so it does not need to be configured
When the rising edge of the timer clock occurs at TI2=1, the counter counts once and the TIMx_STS .TITF flag is
pulled high.
The delay between the rising edge of TI2 and the actual clock of the counter depends on the resynchronization circuit
at the input of TI2.
Timer clock = CK_CNT=CK_PSC
Counter register
External clock source mode 2
This mode is selected by TIMx_SMCTRL .EXCEN equal to 1. The counter can count on every rising or falling edge
of the external trigger input ETR.
The following figure is a schematic diagram of the external trigger input module in External clock source mode 2

Figure 9-18 Control circuit in external clock mode 1

CNTEN
TI2
64
TITF
65
Write TITF=0
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