Figure 10-28 Tim2 Gated By Oc1Ref Of Tim1 - Nations N32G430 Series User Manual

 Setting TIM2_SMCTRL .TSEL = '000' to connect TIM1 trigger output to TIM2.
 Setting TIM2_SMCTRL .SMSEL= '101' to set TIM2 to gated mode.
 Setting TIM2_CTRL1.CNTEN= '1' to start TIM2.
 Setting TIM1_CTRL1.CNTEN= '1' to start TIM1.
Note: The TIM2 clock is not synchronized with the TIM1 clock, this mode only affects the TIM2 counter enable signal.
TIM1
CK_INT
OC1REF
TIM2
In the next example, Gated TIM2 with enable signal of TIM1, refer to Figure 10-29.
TIM2 counts on the divided internal clock only when TIM1 is enable. Both counters are clocked based on CK_INT via
a prescaler divide by 3 is performed (f
The configuration steps are shown as below
 Setting TIM1_CTRL2.MMSEL=' 001' to use the enable signal of TIM1 as trigger output

Setting TIM2_SMCTRL.TSEL = '000' to configure TIM2 to get the trigger input from TIM1
 Setting TIM2_SMCTRL.SMSEL = '101' to configure TIM2 in gated mode.
 Setting TIM2_CTRL1.CNTEN= '1' to start TIM2.

Setting TIM1_CTRL1.CNTEN= '1' to start TIM1.
 Setting TIM1_CTRL1.CNTEN= '0' to stop TIM1.

Figure 10-28 TIM2 gated by OC1REF of TIM1

63 64
CNT
TITF
Clear TIF = 0
CNT
85
= f
CK_CNT CK_INT
65 00
66
86 87 88
/3).
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