Table 5-4 Debug Interface Signal; Table 5-5 Debug Port Image - Nations N32G430 Series User Manual

32-bit arm cortex-m4 microcontroller
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HSE/LSE pins used as GPIO ports
OSC_IN and OSC_OUT of HSE are mapped to PD14 and PD15 respectively, and OSC32_IN and OSC32_OUT of
LSE are mapped to PC14 and PC15 respectively. If HSE or LSE is off, the corresponding pin can be used as GPIO.
If HSE or LSE is on, the corresponding pin goes into analog mode and bypasses the GPIO configuration.
The crystal oscillator is configured as user external clock mode, the pin remains as clock input, and OSC_OUT or
OSC32_OUT can still be used as normal GPIO.
JTAG/SWD alternate function
The chip power-on default enables the SWD-JTAG debug interface, and the interface signal is mapped to the GPIO
port, as shown in the following table.
Debug signal
JTMS/SWDIO
JTCK/SWCLK
JTDO
NJTRST
If you need to use its GPIO function during debugging, you can change the above remapping configuration by setting
the alternate remapping and debugging I/O configuration registers (GPIOx_AFL or GPIOx_AFH). See the table
below.
Possible debug ports for
Complete SWJ(JTAG-DP+SW-DP)
(reset state)
Complete SWJ(JTAG-DP+SW-DP)
But there is no NJTRST.
Turn off JTAG-DP and enable SW-DP.
Turn off JTAG-DP and SW-DP.
Internal pull-up and pull-down on JTAG pins:
It is necessary to ensure that the JTAG input pins are not floating since they are directly connected to flip-flops to
control the debug mode features. Special care must be taken with. The JTCK/SWCLK pin which is directly connected
to the clock of some of these flip-flops.
To avoid any uncontrolled I/O levels, the device embeds internal pull-ups and pull-downs on the JTAG input pins:

Table 5-4 Debug interface signal

JTDI

Table 5-5 Debug port image

PA13/ JTMS/
SWDIO
I/O is not
available
I/O is not
available
I/O is not
available
I/O available
SWD-JTAG I/O pin allocation
PA14/ JTCK/
PA15/ JTDI
SWCLK
I/O is not
I/O is not
available
available
I/O is not
I/O is not
available
available
I/O is not
I/O available
available
I/O available I/O available
Nations Technologies Inc.
114 / 647
Tel:+86-755-86309900
Email:info@nationstech.com
Address: Nations Tower, #109 Baoshen Road, Hi-tech Park North.
Nanshan District, Shenzhen, 518057, P.R.China
GPIO
PA13
PA14
PA15
PB3
PB4
PB3/
PB4/ NJTRST
JTDO
I/O is not
I/O is not available
available
I/O is not available I/O available
I/O available
I/O available
I/O available
I/O available

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