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CC2652RB
SWRS232D – FEBRUARY 2019 – REVISED FEBRUARY 2021
4 Functional Block Diagram
CC2652RB
General Hardware Peripherals and Modules
32 ch. µDMA
AES-256, SHA2-512
4
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Main CPU
®
Arm
®
Cortex
-M4F
Processor
with 8KB
48 MHz
69 µA/MHz
2
2
I
C and I
S
4× 32-bit Timers
2× UART
2× SSI (SPI)
Watchdog Timer
31 GPIOs
Temperature and
Battery Monitor
ECC, RSA
BAW, LDO, Clocks, and References
Optional DC/DC Converter
Figure 4-1. CC2652RB Block Diagram
Product Folder Links:
2.4 GHz
cJTAG
256KB
ROM
Up to
352KB
Flash
Cache
Arm
Cortex
Up to
Processor
80KB
SRAM
TRNG
RTC
CC2652RB
RF Core
ADC
ADC
Digital PLL
DSP Modem
16KB
®
SRAM
®
-M0
ROM
Sensor Interface
ULP Sensor Controller
12-bit ADC, 200 ks/s
Low-Power Comparator
2
SPI-I
C Digital Sensor IF
Constant Current Source
Time-to-Digital Converter
4KB SRAM
Copyright © 2021 Texas Instruments Incorporated
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