Figure 4. P9235A-Rb Physical Layout From P9235A-Rb-Evk Evaluation Board (2Nd Layer (L1)); Figure 5. P9235A-Rb Physical Layout From P9235A-Rb-Evk Evaluation Board (3Rd Layer (L2)) - Renesas P9235A-RB Layout Manual

Figure 4. P9235A-RB Physical Layout from P9235A-RB-EVK Evaluation Board (2nd Layer (L1))
Solid GND Plane with minimal connections, direct contact to GND plane 10mil vias for thermal transfer.
The ground layer (L1) is between the top layer signal plane and layer 3 (second middle layer - L2) gate drive signal layer below.
Figure 5. P9235A-RB Physical Layout from P9235A-RB-EVK Evaluation Board (3rd Layer (L2))
Gate driver traces under V
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© 2019 Integrated Device Technology, Inc
, GND planes (quiet planes), thick power traces, and ground plane with minimal traces especially around the
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P9235A-RB Layout Guide
March 19, 2019