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Contents
1.
Introduction ...................................................................................................................................................................................................2
Key Points for Optimal Layout .............................................................................................................................................................2
2.
Tx Power Circuits .........................................................................................................................................................................................3
Resonance Capacitors ........................................................................................................................................................................8
Sensitive Circuits ...............................................................................................................................................................................10
Boost Capacitors and Gate Drive Lines.............................................................................................................................................11
5V Step Down Switching Regulator ...................................................................................................................................................12
Flash Circuit .......................................................................................................................................................................................13
3.
PCB Footprint Design .................................................................................................................................................................................14
4.
Audible Noise Suppression ........................................................................................................................................................................15
5.
Schematics, Bill of Materials (BOM), and Board Layout .............................................................................................................................16
6.
Revision History ..........................................................................................................................................................................................22
List of Figures
Figure 1. Schematic with Main Power Path (Orange) and Main (Noisy) AC Power Loops (Red) .......................................................................3
Figure 4. P9235A-RB Physical Layout from P9235A-RB-EVK Evaluation Board (2nd Layer (L1)) ....................................................................6
Figure 5. P9235A-RB Physical Layout from P9235A-RB-EVK Evaluation Board (3rd Layer (L2)) .....................................................................6
Figure 6. P9235A-RB Physical Layout from Demo PCB of Bottom Layer ..........................................................................................................7
Figure 7. Resonance Capacitors ........................................................................................................................................................................8
Figure 9. P9235A-RB Typical GND Noise Areas and Sensitive Circuit Placement ..........................................................................................10
Figure 10. Boost Capacitors and Gate Drive Lines.............................................................................................................................................11
Figure 11. 5V Step Down Switching Regulator ...................................................................................................................................................12
Figure 12. Flash Circuit .......................................................................................................................................................................................13
Figure 13. P9235A-RB Recommended PCB Land Pattern Drawing ..................................................................................................................14
Figure 14. Application Schematic .......................................................................................................................................................................16
Figure 15. Silkscreen - Top of Board .................................................................................................................................................................19
Figure 16. Copper - Top Layer ...........................................................................................................................................................................19
Figure 17. Copper L1 Layer ................................................................................................................................................................................20
Figure 18. Copper L2 Layer ................................................................................................................................................................................20
Figure 19. Copper Bottom ..................................................................................................................................................................................21
© 2019 Integrated Device Technology, Inc.
P9235A-RB Layout Guide
1
March 19, 2019

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Summary of Contents for Renesas P9235A-RB

  • Page 1: Table Of Contents

    Figure 7. Resonance Capacitors ..................................8 Figure 8. V , VCC5V, LDO33, LDO18, VBRG_IN, and DRV_VIN Pin Capacitors Placed Close to P9235A-RB with 0.1µF Placed Closest ..9 Figure 9. P9235A-RB Typical GND Noise Areas and Sensitive Circuit Placement ..................10 Figure 10. Boost Capacitors and Gate Drive Lines.............................11 Figure 11.
  • Page 2: Introduction

    Use the layer under the P9235A-RB side of the board as a solid ground plane.  Connect the exposed thermal pad (EP) in the center of the P9235A-RB to all other layers with an array of 4x5 10 mil vias. ...
  • Page 3: Tx Power Circuits

    2. Tx Power Circuits The main power circuit of the P9235A-RB device includes the current sense resistor, the four FETs of the H bridge resonant tank driver, and the resonant tank. Secondary power circuits are the VCC5V, LDO33, and LDO18 regulators.
  • Page 4: Figure 2. Recommended Orientation For The P9235A-Rb And Generic Placement Guide For Select Critical Components

    ), through 1 of the two half bridge power FETs, through the tank capacitor, through the Tx coil (Coil Assembly) and out through 1 of the other half bridge power FETs. Figure 2 represents the optimal orientation of the P9235A-RB relative to the other main components.
  • Page 5: Figure 3. Actual Placement For The P9235A-Rb Evk. Select Critical Components Are Circled In Yellow

    Figure 3. Actual Placement for the P9235A-RB EVK. Select Critical Components are circled in Yellow There are many things to take note of on this top layer with respect to creating an optimal layout (notes refer to the listing embedded in...
  • Page 6: Figure 4. P9235A-Rb Physical Layout From P9235A-Rb-Evk Evaluation Board (2Nd Layer (L1))

    P9235A-RB Layout Guide Figure 4. P9235A-RB Physical Layout from P9235A-RB-EVK Evaluation Board (2nd Layer (L1)) Solid GND Plane with minimal connections, direct contact to GND plane 10mil vias for thermal transfer. The ground layer (L1) is between the top layer signal plane and layer 3 (second middle layer - L2) gate drive signal layer below.
  • Page 7: Figure 6. P9235A-Rb Physical Layout From Demo Pcb Of Bottom Layer

    Figure 6. P9235A-RB Physical Layout from Demo PCB of Bottom Layer GND Plane with Minimal Traces for Maximum Thermal Transfer The outer layers of the PCB will be the most effective at transferring heat from the board to the ambient air or other objects. Spreading the heat into internal layers is also effective for lowering the operating temperature.
  • Page 8: Resonance Capacitors

    Next, place the resonance components. The C44, C47, C48, C49, and C51 capacitors should have wide copper planes connected to them and be in-line from the P9235A-RB to the Tx coil. C0G capacitors will offer the highest performance and are recommended. X7R and X5R can be substituted, but low-ESR components should be used.
  • Page 9: Vcc5V, Drv_Vin

    , LDO33, LDO18, VBRG_IN, and DRV_VIN pin capacitors (C42, C50, C53, C34, C35) are used to stabilize internal voltage supplies used for normal operation. These capacitors must be located close to the P9235A-RB. A 10µF decoupling capacitor is recommended to be placed as close as possible to GND from the V , VCC5V, and DRV_VIN nodes.
  • Page 10: Sensitive Circuits

    Place the current sense circuitry, the voltage demodulation circuitry, and the current demodulation circuitry, in quiet ground areas away from the resonance nodes. Figure 9. P9235A-RB Typical GND Noise Areas and Sensitive Circuit Placement sensitive 5:Isns,demod(C21,28,29,R28)
  • Page 11: Boost Capacitors And Gate Drive Lines

    P9235A-RB Layout Guide Boost Capacitors and Gate Drive Lines Place the boost capacitors (C38, C46) close to their respective pins for maximum transfer of the capacitive energies. Place the gate driver resistors (R35, R40, R44, R47) close to their respective pins. This limits the switching noise generated. Place the FET gate bleed resistors (R36, R42, R45, R48) close to their respective FET gate pad/pin.
  • Page 12: Step Down Switching Regulator

    P9235A-RB Layout Guide 5V Step Down Switching Regulator Keep the switch node small by moving the inductor close to the switch node. This is only after placing all C capacitors as close to their respective pins as possible. Make the L, C loop small to limit the loop inductance and related noise.
  • Page 13: Flash Circuit

    In the flash programming application, P9235A-RB only contains the bootloader, the other program and data are stored into the flash. When P9235A-RB works, it will fetch the instructions or data from flash frequently. Therefore, for keeping signal integrity and minimize the EMI, it’s recommended that: 1) the trace of SS, SCLK, MOSI, and MISO should be as short as possible.
  • Page 14: Pcb Footprint Design

    P9235A-RB Layout Guide 3. PCB Footprint Design The P9235A-RB package is a fine-pitch 40-VFQFN device. Figure 13. P9235A-RB Recommended PCB Land Pattern Drawing © 2019 Integrated Device Technology, Inc March 19, 2019...
  • Page 15: Audible Noise Suppression

    P9235A-RB Layout Guide 4. Audible Noise Suppression Wireless power receiver solutions have been observed to produce audible noise. If sound is detected, there are several steps that can be taken to reduce or eliminate the noise. The first priority is identifying the source (i.e., the rectifier capacitors, the Tx coil ferrite, communication capacitors).
  • Page 16: Schematics, Bill Of Materials (Bom), And Board Layout

    P9235A-RB Layout Guide 5. Schematics, Bill of Materials (BOM), and Board Layout Figure 14. Application Schematic © 2019 Integrated Device Technology, Inc March 19, 2019...
  • Page 17 P9235A-RB Layout Guide Table 1. Application Board Bill of Materials (BOM) Item Quantity Reference Part Description Part Number Footprint C7,C31,C32,C35, 10µF CAP CER 10µF 10V X5R 0603 GRM188R61A106KE69D C42,C45,C55,C56 C8,C30,C33,C34, 0.1µF CAP CER 0.1µF 10V X7R 0402 GRM155R71A104KA01D C38,C46,C57,C66, C67,C68 22nF CAP CER 0.022µF 25V X5R 0402...
  • Page 18 P9235A-RB Layout Guide Item Quantity Reference Part Description Part Number Footprint R35,R40,R44,R47 RES SMD 22Ω 1% 1/10W 0402 RC1005F220CS R36,R42,R45,R48, 100K RES SMD 100kΩ 1% 1/16W 0402 RC0402FR-07100KL R39,R49 RES SMD 0Ω JUMPER 1/16W 0402 RC0402JR-070RP R41,R43 RES SMD 1kΩ 5% 1/16W 0402 RC0402JR-071KL RES SMD 680Ω...
  • Page 19: Figure 15. Silkscreen - Top Of Board

    P9235A-RB Layout Guide Figure 15. Silkscreen – Top of Board Figure 16. Copper – Top Layer © 2019 Integrated Device Technology, Inc March 19, 2019...
  • Page 20: Figure 17. Copper L1 Layer

    P9235A-RB Layout Guide Figure 17. Copper L1 Layer Figure 18. Copper L2 Layer © 2019 Integrated Device Technology, Inc March 19, 2019...
  • Page 21: Figure 19. Copper Bottom

    P9235A-RB Layout Guide Figure 19. Copper Bottom © 2019 Integrated Device Technology, Inc March 19, 2019...
  • Page 22: Revision History

    P9235A-RB Layout Guide Revision History Revision Date Description of Change March 19, 2019 Initial release. Corporate Headquarters Sales Tech Support 6024 Silver Creek Valley Road 1-800-345-7015 or 408-284-8200 www.IDT.com/go/support San Jose, CA 95138 Fax: 408-284-2775 www.IDT.com www.IDT.com/go/sales DISCLAIMER Integrated Device Technology, Inc. (IDT) and its affiliated companies (herein referred to as “IDT”) reserve the right to modify the products and/or specifications described herein at any time, without notice, at IDT's sole discretion.
  • Page 23 Renesas' products are provided only subject to Renesas' Terms and Conditions of Sale or other applicable terms agreed to in writing. No use of any Renesas resources expands or otherwise alters any applicable warranties or warranty disclaimers for these products.

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