Ipn250Rtm Interface Connector (J10); Gpio Header (P1); Jtag Header (P2) - GE IPN250RTM Hardware Reference Manual

18 IPN250RTM

2.3.4 IPN250RTM Interface Connector (J10)

This header connects to P1 on the IPN250RTMB.

2.3.5 GPIO Header (P1)

Table 2-6 IPN250RTMA P1 Header Pin Assignments
Pin Signal Pin
1 GND 2
3 GPIO_0 4
5 GPIO_1 6
7 GPIO_2 8
9 GPIO_3 10
11 GPIO_4 12
13 GPIO_5 14
15 GPIO_6 16
17 GPIO_7 18
19 GND 20

2.3.6 JTAG Header (P2)

This brings out the JTAG signals on the IPN250.
Table 2-7 IPN250RTMA P2 Header Pin Assignments
Pin Signal Pin
1 TRST~ 2
3 TDO 4
5 TDI 6
7 TMS 8
9 TCLK 10
11 Unconnected 12
13 Unconnected 14
15 Unconnected 16
17 Unconnected 18
19 Unconnected 20
This JTAG header can also be used to program Lattice CPLDs on the IPN250. For
convenience in using the Lattice programmer, a P3V3_AUX supply is also
available on the nearby P4 header.
Signal
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
Signal
GND
GND
GND
GND
GND
Unconnected
Unconnected
Unconnected
Unconnected
Unconnected
Publication No. IPN250RTM-HRM/2