Related Manuals for Intel CHIPS DKHiQV-AGP
Summary of Contents for Intel CHIPS DKHiQV-AGP
- Page 1 DKHiQV-AGP (Fab. Rev. A) HiQVideo™ 69000 AGP Demo Kit Documentation User’s Guide Revision 1.0 July 1998...
- Page 2 Copyright© 1998 Chips and Technologies, Inc., a subsidiary of Intel Corporation. ALL RIGHTS RESERVED. This manual is copyrighted by Chips and Technologies, Inc., a subsidiary of Intel Corporation. You may not reproduce, transmit, transcribe, store in a retrieval system, or translate into any language or computer language, in any form or by any means - elec- tronic, mechanical, magnetic, optical, chemical, manual, or otherwise - any part of this publication without the express written permission of Chips and Technologies, Inc., a subsidiary of Intel Corporation.
- Page 3 Revision History Revision Date Comment 7/1/98 JW/lnc/bjb Initial release for Fab. Rev. A Boards.
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Page 4: Table Of Contents
Table of Contents Product Description ............... 1 Features . - Page 5 List of Figures Figure 1: 24 Bit Flat Panel Connector Pinout ............5 Figure 2: 36 Bit Flat Panel Connector Pinout .
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Page 6: Product Description
DKHiQV-AGP (Fab. Rev. A) User’s Guide DKHiQV-AGP (Fab. Rev. A) HiQVideo 69000 AGP Demo Kit Documentation Introduction/Product Description The 69000 series graphics accelerators are very high performance LCD/CRT controllers that provide a com- plete video subsystem solution with low power consumption, hardware acceleration for GUI applications and a minimal component count. -
Page 7: Features
DKHiQV-AGP (Fab. Rev. A) User’s Guide Features The DKHiQV-AGP has the following features when running a 69000 HiQVideo™ controller: • FRAME-based AGP (formally PCI-66) • High Performance Flat Panel/CRT GUI Accelerator running on PCI Bus • 50-pin flat panel connector for interfacing to most types of flat panels (up to 24 data bits). •... -
Page 8: Installation
DKHiQV-AGP (Fab. Rev. A) User’s Guide Installation The DKHiQV-AGP board is very flexible and can be configured for a variety options such as multimedia in- terfaces supported by the HiQVideo™ 69000 controller. The DK board support a variety of direct panel and CRT interfaces. -
Page 9: Accelerated Graphics Port
DKHiQV-AGP (Fab. Rev. A) User’s Guide Accelerated Graphics Port 3.2.1 AGP Bus Interface The DK board interfaces directly with the AGP and supports PCI burst mode operation. The Accelerated Graphics Port (AGP) is a high performance bus and is based on enhancements to the PCI bus. The AGP uses the 66MHz PCI 2.1 specification as an operational baseline. -
Page 10: Display Interface
DKHiQV-AGP (Fab. Rev. A) User’s Guide Display Interface 3.3.1 CRT Display Interface The DK Board provides direct interface to analog CRTs through an industry standard 15-pin connector (J4). 3.3.2 Flat Panel Display Interface The DKHiQV-AGP board has a 50-pin connector (J5) which provides all necessary signals to interface with any flat panel having a data word size of 24 bits or less (see figure 1). -
Page 11: Simultaneous Display Interface
DKHiQV-AGP (Fab. Rev. A) User’s Guide Figure 2. provides the 12 additional data bits needed for 36-bit panels on J11.: Name Pin # Pin # Name Figure 2: 36 Bit Flat Panel Connector Pinout 3.3.4 Simultaneous Display Interface The DKHiQV-AGP board supports simultaneous flat panel and CRT displays. The HiQVideo™ controllers supports 60 Hz vertical refresh for simultaneous display CRT and TFT/SSTN color panels. -
Page 12: Table 2: Flat Panel Connection Summary
DKHiQV-AGP (Fab. Rev. A) User’s Guide Table 2: Flat Panel Connection Summary Monochrome Color Pin # DK 50pin Single DD 8bit TFT HR STN 4bit STN DD STN DD Name Connect. Panel 16bit 16bit 18/24bit 18/24bit pack Extended 8bit 16bit 4bit Pack Pixels Transferred 5 1/3... -
Page 13: Dkhiqv-Agp Multimedia Interfaces
DKHiQV-AGP (Fab. Rev. A) User’s Guide DKHiQV-AGP Multimedia Interfaces 3.4.1 NTSC/PAL Composite Video Output (TV Out) The HiQVideo™ controllers provide video encoder support and a composite sync signal which some encod- ers require. DK boards incorporate an NTSC/PAL encoder from Analog Device (AD722 or AD723) to con- vert the VGA signals to the composite NTSC video and S-VHS video signals. -
Page 14: Multimedia Card/Tv Tuner Interface
DKHiQV-AGP (Fab. Rev. A) User’s Guide 3.4.2 Multimedia Card/TV Tuner Interface The DKHiQV-AGP board provides a video interface from a multimedia card or zoom video port (ZV port). The 65550 MM card provides YUV video to the DK board. For more detailed information, please refer to the MM655x MM User’s Guide. -
Page 15: Mpeg And Zv Port Connector
DKHiQV-AGP (Fab. Rev. A) User’s Guide 3.4.3 MPEG and ZV Port Connector The DKHiQV-AGP board also provides another connector for YUV video interface. The J7 connector re- ceives YUV data from an MPEG or PCMCIA ZV interface card. Figure 4 shows the MPEG ZV port pinout: Name Pin # Pin #... -
Page 16: Mixed Voltage Generation And Power Measurement
DKHiQV-AGP (Fab. Rev. A) User’s Guide Mixed Voltage Generation and Power Measurement The DKHiQV-AGP board has jumpers to choose different supply voltages for each block of the video sub- system. The voltages chosen could be 5V from the bus, 3.3V from the bus or a voltage from an onboard voltage regulator. -
Page 17: Veesafe For Panel Operation
DKHiQV-AGP (Fab. Rev. A) User’s Guide VEESAFE for Panel Operation 3.7.1 Low Voltage for Panel Operation A new jumper (W39) has been added to allow VEESAFE to be driven by a scaled version of VDDSAFE for newer panels that have a low voltage requirement for VEESAFE. = 1-2 VEESAFE is controlled by R28 (potentiometer) = 2-3... -
Page 18: 3Dqho/Lqn ™ Transmitter
DKHiQV-AGP (Fab. Rev. A) User’s Guide 3DQHO/LQN 3.8.2 Clean 3.3V Power for the Transmitter 3DQHO/LQN JP4 allows 3.3V to be supplied to the transmitter and receiver cards from the 3V regulator U13 (Voltage adjusted by R75). JP4 also allows 5V to be used instead for other types of interfaces such as 5V 3DQHO/LQN 3DQHO/LQN LVDS. -
Page 19: Dkhiqv-Agp Board Configuration Guide
DKHiQV-AGP (Fab. Rev. A) User’s Guide DKHiQV - AGP Board Configuration Guide DKHiQV - AGP Board Component Layout J3 C M P S J4 Video V ideo ST AN D BY J2 A cces s B us J1 S Video W 40 W 10 JP10... -
Page 20: Dkhiqv-Agp Demo Connector Description
DKHiQV-AGP (Fab. Rev. A) User’s Guide DKHiQV - AGP Demo Connector Description Table 4 below identifies the function of the twelve different connectors on the DKHiQV-AGP board. Refer to Figure 5. Table 4: DKHiQV-AGP Board Connector Functions Connectors Function SVIDEO Video connector Access Bus RCA jack, composite video out 15-pin VGA connector... -
Page 21: Dkhiqv-Agp Jumper Description
DKHiQV-AGP (Fab. Rev. A) User’s Guide DKHiQV-AGP Jumper Description Table 5 lists the jumpers supported on the DKHiQV-AGP board Table 5: DKHiQV-AGP Jumper Description Jumper Setting Description OPEN Normal Mode CLOSED Standby mode OPEN AD722 is configured as 4FSC CLOSED AD722 is configured as FSC OPEN 14 MHz oscillator enabled... - Page 22 DKHiQV-AGP (Fab. Rev. A) User’s Guide OSCVCC is 5V OSCVCC is W35 voltage AVCC55Xis 5VNC AVCC55X is W35 voltage IVCC55X is W29 voltage IVCC55X is output of U13 W29 voltage is 5VNC W29 voltage is W35 voltage DVCC55X is 5VNC DVCC55X is W35 voltage MVCC55X from 5VNC MVCC55X from 3VMAIN...
- Page 23 DKHiQV-AGP (Fab. Rev. A) User’s Guide JP9/JP10 pin 1 is driven by 32KHZ/GPIO1/GPIO2. JP9 pin 3 is driven by 32KHZ/GPIO1/CSYNC JP9 pin 3 is driven by ENABKL/GPIO1/CSYNC JP9/JP10 pin 1 is driven by ENABKL/GPIO1/CSYNC JP10 JP9/JP10 pin 1 is driven by 32KHZ/GPIO1/GPIO2. 32 KHz oscillator drives 32KHZ/GPIO1/GPIO2 signal (NOT VALID) JP9/JP10 pin 1 is driven by 54GPIO2...
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Page 24: Dkhiqv-Agp Jumper Settings
DKHiQV-AGP (Fab. Rev. A) User’s Guide DKHiQV-AGP Jumper Settings 5.4.1 Default Settings with TV Out and Multimedia Disabled Table 6: DKHiQV-AGP (Rev. A) Board Configuration Settings for 69000 Jumper Function* State** Jumper Function* State** sh.2, STANDBY sh.4, BVCC55X sh.5, TV out sh.4, XVCC55X sh.2, 14MHz sh.4, 3VMAIN... -
Page 25: Default Settings With Tv Out Enabled
DKHiQV-AGP (Fab. Rev. A) User’s Guide 5.4.2 Default Settings with TV Out Enabled Table 7: DKHiQV-AGP Jumper Configuration Settings for TV Out Enabled Jumper NTSC Function* State** Jumper PAL Function* State** sh.5 TV OUT sh.5 TV OUT sh.5 TV OUT sh.5 TV OUT sh.2, TV OUT disable CRT sh.2, TV OUT disable CRT... -
Page 26: Dkhiqv-Agp Troubleshooting Procedures
DKHiQV-AGP (Fab. Rev. A) User’s Guide DKHiQV-AGP Troubleshooting Procedures Check that all jumpers and DIP switch positions are set to their default positions. Verify that socket U2 contains a PCI BIOS ROM Verify that other parts in the system function properly by using a known working VGA board with the system. - Page 27 DKHiQV-AGP (Fab. Rev. A) User’s Guide Chips and Technologies, Inc. a subsidiary of Intel Corporation Title: DKHiQV-AGP UG 2950 Zanker Road Publication No.: UG176 San Jose, California 95134 Stock No.: 050176-000 Phone: 408-434-0600 Revision No.: FAX: 408-894-2077 Date: 7/13/98 &+,36 ®...