Power-Down Sequence; Figure 7.2. Power-Down Sequence; Table 7.1. Power-Up Sequence - Lattice Semiconductor mVision AR0234 User Manual

Lattice mVision AR0234 Sensor Board
User Guide

Table 7.1. Power-up Sequence

SN Definition
1 V /V _PIX/V _PHY to V
AA AA AA
2 V IO to V IO_PHY
DD DD
3 V IO_PHY to V /V
DD DD
4 V /V _PHY to V
DD DD DD
5 Xtal Settle Time (Component Dependent)
6 Hard Reset
7 Internal Initialization
8 PLL Lock Time
Notes:
1. V and V _DATA can be tied together (t
DD DD
2. V /V PIX/V _PHY can be tied together.
AA AA AA

7.2. Power-Down Sequence

The recommended power-down sequence for the AR0234 is shown in Figure 9. The available power supplies
(VAA/VAA_PIX/VAA_PHY, VDDIO, VDDIO_PHY, VDD/VDD_PHY, and VDD_DATA) must have the separation specified
below.
Disable streaming if output is active by setting standby R0x301a[2] = 0.
The soft standby state is reached after the current row or frame, depending on configuration, has ended.

Turn off VDD_DATA.

Turn off VDD/VDD_PHY.

Turn off VDDIO_PHY.

Turn off VDDIO.

Turn off VAA/VAA_PIX/VAA_PHY
V
(1.2)
DD_DATA
V
DD
V
DD_PHY
(1.2)
V
IO_PHY (1.8)
DD
V
IO (1.8/2.8)
DD
V
AA
V
AA_PIX
V
AA_PHY
(2.8)
EXTCLK
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20
IO
DD
_PHY
DD
_DATA
becomes 0 in this case).
4
t
1
t
2
t
3
t
4

Figure 7.2. Power-down Sequence

Symbol Min
t 0
1
t
0
2
t
0
3
t
0
4
t
—
x
t
1
5
t
16000
6
t
1
7
t
5
Power Down until Next Power Up
Typ Max Unit
—
100 µs
— µs
100
— µs
100
— µs
100
— ms
30 ms
— — ms
— — EXTCLK
— — ms
FPGA-UG-02124-1.1