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Lattice Semiconductor LatticeMico32 Hardware Developer User Manual

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LatticeMico32 Hardware
Developer User Guide
May 2014

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Summary of Contents for Lattice Semiconductor LatticeMico32

  • Page 1 LatticeMico32 Hardware Developer User Guide May 2014...
  • Page 2 Lattice Semiconductor Corporation or its subsidiaries in the United States and/or other countries. ISP, Bringing the Best Together, and More of the Best are service marks of Lattice Semiconductor Corporation. Other product names used in this publication are for identification purposes only and may be trademarks of their respective companies.
  • Page 3 Omitted lines in code and report examples. Optional items in syntax descriptions. In bus specifications, the brackets are required. Grouped items in syntax descriptions. Repeatable items in syntax descriptions. A choice between items in syntax descriptions. LatticeMico32 Hardware Developer User Guide...
  • Page 4 LatticeMico32 Hardware Developer User Guide...

  • Page 5: Table Of Contents

    About the LatticeMico System Tools 7 LatticeMico System Requirements 8 Running LatticeMico System 8 LatticeMico System Perspectives 9 Setting Up Diamond for a LatticeMico32 Platform 13 Creating a New Diamond Project 13 Recommended IP Design Flow 14 Creating the Microprocessor Platform in MSB 15...
  • Page 6 Making Custom Components Available in MSB 90 Integrating Custom Component’s RTL Design Files 90 Saving the Settings 90 Directory Structure 90 Custom Component Example 92 Sample Custom Component 92 Adding the Custom Component 100 Output 112 Glossary Index LatticeMico32 Hardware Developer User Guide...

  • Page 7: Latticemico System Overview

    “Related Documentation” on page 5. LatticeMico System Design Flow This section lists the major steps involved in designing a LatticeMico32 embedded microprocessor. In addition to running the FPGA flow in Lattice Diamond, you use the integrated System software to build both hardware and software features of your embedded soft-core microprocessor.
  • Page 8 It covers all relevant topics to enable you to run through a complete LatticeMico32 design flow. It is highly recommended that you start out with the tutorial.

  • Page 9: Device Support

    LatticeSC  LatticeSCM Design Flow Steps The major steps involved in designing a LatticeMico32 soft-core microprocessor are the following: 1. Create a project in the Lattice Diamond software that targets the desired device family. 2. Use the Mico System Builder (MSB) in the LatticeMico System software to create and develop a microprocessor platform.
  • Page 10 Figure 2 shows the LatticeMico System design flow. Figure 2: LatticeMico System Design Flow For complete information about using the C/C++ SPE and Debugger perspectives to build and test your software application, refer to the LatticeMico32 Software Developer User Guide. LatticeMico32 Hardware Developer User Guide...

  • Page 11: Related Documentation

    LatticeMico32/DSP Development Board User Guide, which describes the features and functionality of the LatticeMico32/DSP development board. This board is designed as a hardware platform for design and development with the LatticeMico32 microprocessor, as well as for the LatticeMico8 microcontroller, and for various DSP functions. ...
  • Page 12 LatticeECP2M devices  LatticeECP2M Family Data Sheet  LatticeECP3 FPGA Family Handbook, which is a collection of the data sheets and application notes on LatticeECP3 devices  LatticeECP3 Family Data Sheet LatticeMico32 Hardware Developer User Guide...

  • Page 13: Using The Latticemico System Software

    Debugger, which enables you to analyze the software application code to identify and correct errors The LatticeMico32 tools share the same Eclipse workbench, which provides a unified graphical user interface for the software and hardware development flows. You use MSB to define the structure of your microprocessor or your...

  • Page 14: Latticemico System Requirements

    Hat Linux operating system, see the “Installing LatticeMico32 Development Tools” chapter of the Diamond <release_number> Installation Notice for Linux, available on the Lattice Semiconductor Web site and the LatticeMico32 online Help. For information on installing Diamond, see the Diamond <release_number>...

  • Page 15: Latticemico System Perspectives

    If you perform some changes in a view such as the Editor view in one perspective, it will affect what you see in another perspective that contains the same view. Do not assume that a given LatticeMico32 Hardware Developer User Guide...
  • Page 16 Debugger perspectives, refer to the LatticeMico System Software Developer User Guide. More information about the graphical user interface for each perspective is described in more detail in the LatticeMico32 online Help. The LatticeMico System software enables you to customize existing default perspectives, create your own perspectives, and control what views are open in a given perspective.
  • Page 17 To change the default perspective: 1. From within a given perspective, choose Window > Preferences. 2. From the Preferences window, expand the General category on the left and select Perspectives. The Perspectives preferences page opens. LatticeMico32 Hardware Developer User Guide...
  • Page 18 To reopen a view that you previously closed:  In a given perspective, choose Window > Show View and select the view that you wish to reopen from the submenu. The view is reopened in its original area in the interface. LatticeMico32 Hardware Developer User Guide...

  • Page 19: Setting Up Diamond For A Latticemico32 Platform

    Diamond <release_number> Installation Guide for Linux. Creating a New Diamond Project After you create a new Diamond project, you can import a LatticeMico32 platform into the design. If your design includes a platform with IP cores, you should also follow the guidelines in “Recommended IP Design Flow” on page 14.

  • Page 20: Recommended Ip Design Flow

    Diamond project you just created, do not change the directory location. 4. Add the LatticeMico32 Processor to the platform and any desired memory and peripheral components, as described in “Adding Microprocessor and Peripherals to Your Platform” on page 19.

  • Page 21: Creating The Microprocessor Platform In Msb

    During its launch process, the LatticeMico System software creates an Eclipse workspace file. This file is created in your home directory. On the Windows operating systems, it is in the Documents and Settings directory. On the Linux operating system, it is in ~. LatticeMico32 Hardware Developer User Guide...
  • Page 22 Editor view.  Editor view, which is a table that displays the current platform definition from the components that you have chosen in the Available Components view. It includes the following columns: LatticeMico32 Hardware Developer User Guide...

  • Page 23: Creating A Platform Description In Msb

     Size, which displays the number of addresses available for component access. This field is editable for the LatticeMico32 on-chip memory controller and LatticeMico32 asynchronous SRAM controller components only.
  • Page 24 4. If the design that will incorporate this platform is in pure Verilog code, leave Create VHDL Wrapper unselected. If the design that will incorporate this platform is in mixed Verilog/VHDL, do the following. a. Select Create VHDL Wrapper. LatticeMico32 Hardware Developer User Guide...
  • Page 25 PLLs or any IPs, which are components that you download from IPexpress. In addition, you cannot generate a VHDL wrapper for the platform. If you want to perform these functions, you must install LatticeMico32 with the Diamond software. See the references given in “LatticeMico System Requirements” on page 8 for information on installing Diamond and LatticeMico System.
  • Page 26 Available Components view. If you want to see information about it before you place it in the Editor view, click it once. 2. Set the options in the Add LatticeMico32 dialog box and click OK. LatticeMico System provides several peripheral components, I/Os, and memories that you can add to your microprocessor design structure.

  • Page 27: Connecting Master And Slave Ports

    Connecting Master and Slave Ports The LatticeMico32 CPU component acts as the master to the peripheral slave components that are attached to the bus structure, allowing it to have unidirectional control over those devices.
  • Page 28 Each master port connected to the arbiter has priority of access to the slave ports. In the case of simultaneous access requests by multiple master ports, the highest-priority master port is granted access to the slave. Master ports LatticeMico32 Hardware Developer User Guide...
  • Page 29 If the application requires a certain master to have access to a slave as soon as the current master is finished with the data transfer, the slave-side fixed scheme is the best option. LatticeMico32 Hardware Developer User Guide...
  • Page 30 Platform Tools menu, as shown in Figure 11. However, in the slave-side round-robin arbitration scheme, you cannot change the priorities of the master ports because the arbitration between the master ports occurs in a round- robin fashion. The Edit Arbitration Priorities command on the Platform Tools LatticeMico32 Hardware Developer User Guide...
  • Page 31 Figure 12 shows the Platform Tools menu with the Edit Arbitration Priorities command disabled in the MSB perspective after all components have been added in a slave-side round-robin arbitration scheme. LatticeMico32 Hardware Developer User Guide...

  • Page 32: Changing Master Port Arbitration Priorities

    2. In the Edit Arbitration Priorities dialog box, click in the Priority column next to the master port whose priority you wish to change. 3. Type in the new priority number. 4. Click OK and choose File > Save to save this in the .msb file. LatticeMico32 Hardware Developer User Guide...

  • Page 33: Assigning Component Addresses

    Any LatticeMico32 Hardware Developer User Guide...
  • Page 34 1. In the MSB perspective, choose Platform Tools > Generate Address or click the Generate Address toolbar button . You can also right-click in the Editor view and choose Generate Address from the pop-up menu. LatticeMico32 Hardware Developer User Guide...
  • Page 35 2. Manually type in the desired address hexadecimal location. 3. Choose File > Save. The edited addresses are now saved in the .msb file. LatticeMico32 Hardware Developer User Guide...

  • Page 36: Assigning Component Interrupt Priorities

    Generating the Microprocessor Platform Generating the microprocessor platform saves and updates the platform definition by updating the .msb file. It also does the following:  Assigns addresses to components without locked addresses LatticeMico32 Hardware Developer User Guide...
  • Page 37 It is used by users of the Verilog flow and the VHDL flow.  A <platform_name>.v (Verilog) file, which is used by both Verilog and VHDL users: LatticeMico32 Hardware Developer User Guide...
  • Page 38 For the VHDL user, no equivalent file is generated that contains the component declaration and component instance/portmap template for the platform wrapper <platform_name>_vhd.vhd. The generated <platform_name>_vhd.vhd file can be used to create one, if required. Figure 14 shows the instantiation template for the platform1 platform. LatticeMico32 Hardware Developer User Guide...

  • Page 39: Implementing Shared Bidirectional Bus To Board

    If you want to change that connection, you must manually modify the code in the <platform_name>.v file in the ./<platform_name>/soc directory by adding logic to the tristates so that multiple LatticeMico32 components can share this bidirectional bus. IF you want to modify the shared bidirectional data bus in certain platform components in the VHDL, you must modify the verilog code to change the tristate control.
  • Page 40 Figure 15 further clarifies the connection. For all non-bidirectional I/Os, the I/O buffers (in green) are provided by the VHDL wrapper during VHDL synthesis. The bidirectional I/O buffers (in red) are provided by the .ngo file itself. LatticeMico32 Hardware Developer User Guide...

  • Page 41: Synthesizing The Platform To Create An Edif File (Linux Only)

    <uart_core> is the name of the UART  <platform_name>/components/<wb_sdr_ctrl>/rtl/verilog, where <wb_sdr_ctrl> is the name of the SDRAM controller If your platform includes an OPENCORES I2CM component, you must add an additional directory to the search path as follows: LatticeMico32 Hardware Developer User Guide...

  • Page 42: Design Guidance For Platform Performance

    EDIF file output by the synthesis tool. You also specify the connections from the microprocessor to the chip pins by importing an .lpf file. You can optionally perform functional simulation and timing simulation. Primarily, you LatticeMico32 Hardware Developer User Guide...
  • Page 43 , browse to the <platform_name>\soc directory, and click OK. Click OK to add the path to the Project Properties and close the “Verilog Include Search Path” dialog box. g. Click OK to return to the Diamond main window. LatticeMico32 Hardware Developer User Guide...
  • Page 44 1. In Diamond, select the Process tab. 2. In the Process pane, under Export Files, double-click Bitstream File. The Diamond software generates the programming file in your project folder. It is now ready for downloading onto the device. LatticeMico32 Hardware Developer User Guide...

  • Page 45: Downloading Hardware Bitstream To The Fpga

    7. Click Download. The Programmer downloads the data file to the target device. A Status box indicates the progress of the operation, reports any errors, and shows whether the operation was successful. LatticeMico32 Hardware Developer User Guide...

  • Page 46: Performing Hdl Functional Simulation Of Latticemico32 Platforms

    Mentor Graphics ModelSim™ or Aldec Active-HDL™. The method described is applicable to designs written in VHDL, Verilog, or a combination of both. The example LatticeMico32 platform in this topic uses the FPGA's on-chip memory, Embedded Block Ram (EBR). The firmware (C/C++ code) is compiled using the Lattice C/C++ SPE and Debug software, and a memory initialization file is created that is loaded into the on-chip memory.

  • Page 47: Configuring The Platform With Latticemico System Builder

    : Performing HDL Functional Simulation of LatticeMico32 Platforms SING THE ATTICE YSTEM OFTWARE with the deployed software. The EBR memory size must be large enough to hold your C/C++ application. In this example, the memory is 128KB, which is more than enough for the “Hello World” application but too large for most FPGAs to support.
  • Page 48 : Performing HDL Functional Simulation of LatticeMico32 Platforms SING THE ATTICE YSTEM OFTWARE Figure 18: LM32 Setup The components directory contains RTL and software drivers that pertain to each of the components instantiated within the design. Important files in the soc directory include: ...
  • Page 49 : Performing HDL Functional Simulation of LatticeMico32 Platforms SING THE ATTICE YSTEM OFTWARE Figure 19: VHDL Wrapper library ieee; use IEEE.std_logic_1164.all; entity Platform_vhd is port ( clk_i : in std_logic; reset_n : in std_logic; sramsram_wen : out std_logic; sramsram_data : inout std_logic_vector(31 downto 0);...

  • Page 50: Preparing For Hdl Functional Simulation

    : Performing HDL Functional Simulation of LatticeMico32 Platforms SING THE ATTICE YSTEM OFTWARE Preparing for HDL Functional Simulation The following sections describe the steps required to perform functional simulation on a given platform. 1. Create the Simulation Directory. Functional simulation is performed in a directory that is created under the top-level directory, which is named Platform in this example.
  • Page 51 : Performing HDL Functional Simulation of LatticeMico32 Platforms SING THE ATTICE YSTEM OFTWARE Figure 20: Testbench File (Continued) /*---------------------------------------------------------------------- Clock & Reset ----------------------------------------------------------------------*/ initial begin reset_n = 0; #290; // delay 290 ns reset_n = 1; initial begin clk_i = 0;...
  • Page 52 : Performing HDL Functional Simulation of LatticeMico32 Platforms SING THE ATTICE YSTEM OFTWARE 3. Replace PMI Black-box Instantiations with Behavioral Models. The black-box instantiation of each PMI module in the file pmi_def.v must be replaced with its respective behavioral model. The PMI behavior models are located in the simulation directory of the Diamond installation: <diamond_install_path>/cae_library/simulation/verilog/pmi...
  • Page 53 : Performing HDL Functional Simulation of LatticeMico32 Platforms SING THE ATTICE YSTEM OFTWARE Figure 22: PMI Models in Platform Simulation Directory LatticeMico32 Hardware Developer User Guide...

  • Page 54: Performing Hdl Functional Simulation With Aldec Active-Hdl

    : Performing HDL Functional Simulation of LatticeMico32 Platforms SING THE ATTICE YSTEM OFTWARE Performing HDL Functional Simulation with Aldec Active-HDL To perform HDL functional simulation with Aldec Active-HDL, first create a script, “aldec_script.do,” and place it in the simulation directory. Copy the following commands into the script: cd “<path_to_toplevel_directory>/Platform/simulation”...

  • Page 55: Using Latticemico System As A Stand-Alone Tool

    System installed in order to generate the files and provide them to the software developer. The following scenario shows the tasks involved: Hardware Developer The hardware developer performs the following tasks: 1. Uses Diamond to create an FPGA development project. LatticeMico32 Hardware Developer User Guide...
  • Page 56 2. Creates a new managed make or standard make project in C/C++ SPE. 3. Implements the LatticeMico32 firmware. 4. Compiles the LatticeMico32 firmware using the Project > Build all command. 5. Runs and debugs the application. LatticeMico32 Hardware Developer User Guide...

  • Page 57: Creating Custom Components In Latticemico System

    This chapter assumes that you have implemented your custom component and that your custom component has a WISHBONE interface that contains the signals required for connecting to the LatticeMico32’s WISHBONE fabric. Your custom component may have a custom I/O interface that may need to be used as platform input and output pins.

  • Page 58: Opening The Import/Create Custom Component Dialog Box

    Opening the Import/Create Custom Component Dialog Box The LatticeMico32 MSB perspective has an Import/Create Custom Component dialog box that allows you to create or import custom components for use in your MSB platform. To import your WISHBONE-interface-compliant custom component, you must have the following items: ...

  • Page 59: Specifying Component Attributes

    It enables you to specify attributes for your custom component. It also provides the location for creating the custom component and the MSB- specific component properties. Figure 25 shows the steps involved in specifying the component attributes. LatticeMico32 Hardware Developer User Guide...

  • Page 60: Component Location And Directory Structure

    Figure 26. This directory structure is created in the directory specified in the “New Component Directory box. This directory structure is created only after all the information is provided. Figure 26: Directory Structure Created LatticeMico32 Hardware Developer User Guide...

  • Page 61: Component Properties

    LatticeMico32 processor’s cacheable region. Choose IO or Memory from the drop-down menu. Memory components reside in the lower 2G of the LatticeMico32 memory map and can be added to the instruction and data ports. I/O components reside in the upper 2G. The I/O component can only be connected to the data port.

  • Page 62: Specifying Wishbone Interface Connections

    You specify the WISHBONE interface connections for master ports and slave ports in the Master/Slave Ports tab of the Import/ Create Custom Component dialog box. Refer to the LatticeMico32 Processor Reference Manual for information on WISHBONE port signals.
  • Page 63 Master/Slave Ports group box by modifying the appropriate element in the Port Attributes group box. When the changes are complete, click the Update button to make the changes permanent. LatticeMico32 Hardware Developer User Guide...
  • Page 64 Port Attributes between the WISHBONE signal names in your custom component and the WISHBONE signal names attached to the LatticeMico32 bus arbiter. Refer to Table 3 on page 59 for a description of WISHBONE slave port signals. The Update button is only Update Updates the options in the Master/Slave Ports tab.
  • Page 65 Displays the help for the dialog box. Table 3 lists the signals required to connect the master port to the LatticeMico32 platform. Table 4 lists the signals required to connect the slave port to the LatticeMico32 microprocessor. The ports that make up the WISHBONE master or slave port must follow the specifications described in the LatticeMico32 Processor Reference Manual table entitled “List of...
  • Page 66 : Specifying WISHBONE Interface Connections REATING USTOM OMPONENTS IN ATTICE YSTEM Table 4: LatticeMico32 Slave Component WISHBONE Ports Component Port Names for Direction Width Required WISHBONE Slave Port <Prefix>_ADR_I Input <Prefix>_DAT_I Input <Prefix>_WE_I Input <Prefix>_SEL_I Input <Prefix>_STB_I Input <Prefix>_CYC_I Input <Prefix>_LOCK_I...

  • Page 67: Specifying Clock/Reset And External Ports

    Specifying Clock/Reset and External Ports Connecting the component to the WISHBONE bus enables the LatticeMico32 microprocessor to control and access the custom component. The custom component has its own unique input and output control signals that must be connected outside of the platform to the rest of the system.
  • Page 68 : Specifying Clock/Reset and External Ports REATING USTOM OMPONENTS IN ATTICE YSTEM Figure 29: Selecting the Slave Port Step 1: Select SlavePort. Step 2: Specify display name. Step 3: Select prefix. LatticeMico32 Hardware Developer User Guide...
  • Page 69 : Specifying Clock/Reset and External Ports REATING USTOM OMPONENTS IN ATTICE YSTEM Figure 30: Entering the Signal Names Step 4: Specify component port signals. Step 5: Click Add button. LatticeMico32 Hardware Developer User Guide...
  • Page 70 Deletes the selected external port from the Parameters list. Note: You cannot “undo” a port deletion. If you click OK, the port will be permanently deleted. You cannot delete the ClockPort, ResetPort, or Interrupt entries. LatticeMico32 Hardware Developer User Guide...
  • Page 71 Performs a design-rule check of the new component. Save Adds the custom component to LatticeMico32. If the design-rule check fails, a message appears that warns you that the data to be saved contains errors and cannot be used in a platform. The component icon displays a small red “x” in the bottom left-hand corner.
  • Page 72 It also requires an interrupt line to be connected to the processor. The component’s mandatory clock input port is named “wb_clk,” and the mandatory reset port is named “wb_rst.” LatticeMico32 Hardware Developer User Guide...
  • Page 73 4. Repeat steps 1 through 3, but select the Reset Port line in step 1 and enter wb_rst in step 2 to specify the Reset port connection. The GUI should now look like the figure shown in Figure 35. LatticeMico32 Hardware Developer User Guide...
  • Page 74 3. Enter interrupt_signal in the Connect To box to specify the interrupt port connection between your component and the GUI-generated wrapper, as shown in Figure 36. 4. Click the Update button to apply this specification. LatticeMico32 Hardware Developer User Guide...
  • Page 75 4. Since the external port is 16 bits wide, enter 16 in the Width box. The MSB Run Generator function creates the LatticeMico32 top-level Verilog file, which exposes the signals from your custom component. For this example, you will make MSB expose the “external_out_bus”...
  • Page 76 : Specifying Clock/Reset and External Ports REATING USTOM OMPONENTS IN ATTICE YSTEM Figure 36: Specifying the Interrupt Port Connection LatticeMico32 Hardware Developer User Guide...
  • Page 77 Modify the editable boxes and select the Add button to add the other port specifications. Once you have done this, the External Ports tab should look like Figure 38, completing the step of declaring the component’s external interface. LatticeMico32 Hardware Developer User Guide...

  • Page 78: Specifying Rtl Files

    Currently the only HDL available in MSB is Verilog. Components written in VHDL must have a Verilog black-box wrapper around them. The VHDL component must be compiled to NGO format independently of MSB, using Lattice Diamond, and placed in the working directory. LatticeMico32 Hardware Developer User Guide...
  • Page 79 This entry box enables you to enter a file name containing HDL code that is a part of your component. Enter a path and module name directly or use the Browse button to add HDL files interactively. LatticeMico32 Hardware Developer User Guide...

  • Page 80: Specifying User-Configurable Parameters

    Performs a design-rule check of the new component. Save Adds the custom component to LatticeMico32. If the design-rule check fails, a message appears that warns you that the data to be saved contains errors and cannot be used in a platform. The component icon displays a small red “x” in the bottom left-hand corner.

  • Page 81: Rtl Parameters

    List is that List lets you specify a predefined list of values. Frequency Platform frequency (passed by MSB provides the platform .PARAMETER(FREQUENCY_I MSB when generating a frequency value (for example, N_MHz) platform) 25 MHz is passed as 25). LatticeMico32 Hardware Developer User Guide...

  • Page 82: Predefined Rtl Parameters

    Value Type Description Allowable Values RTL Translation Example Define Conditional type #define PARAMETER (1) undef #define PARAMETER (0) String Character string type Any printable characters #define PARAMETER “VALUE” Integer Numeric type Any numeric value #define PARAMETER(VALUE) LatticeMico32 Hardware Developer User Guide...

  • Page 83: Predefined Software Parameters

     Text – Enables you to enter a value.  Combo – Enables you to select pre-determined values from a drop-down menu.  Spinner – Enables you to select a value from a pre-determined range. LatticeMico32 Hardware Developer User Guide...

  • Page 84: Adding Rtl Parameters

    Step 6: Provide default value. Step 7: Enter text to be displayed in component configuration dialog box in MSB. Step 8: Provide widget settings, if widget is spinner or combo. Step 9: Click Add button. LatticeMico32 Hardware Developer User Guide...

  • Page 85: Adding Non-Rtl Parameters

    Specifies how each parameter or `define is initialized when a component is added to the platform. This field is free-form, so you must be careful when entering default values. Any type mismatch or incorrect data entered here will impact the synthesis process later. LatticeMico32 Hardware Developer User Guide...

  • Page 86: Specifying Software Elements

    Performs a design-rule check of the new component. Save Adds the custom component to LatticeMico32. If the design-rule check fails, a message appears that warns you that the data to be saved contains errors and cannot be used in a platform. The component icon displays a small red “x” in the bottom left-hand corner.
  • Page 87 C/C++ SPE managed-make build process. In Figure 43, you select the initial value by selecting an appropriate parameter available in the Value drop-down menu (step 3d). The parameter value types define which LatticeMico32 Hardware Developer User Guide...
  • Page 88 Values are enclosed in quotation marks. char * String, List Values are enclosed in quotation marks. unsigned char * String, List Values are enclosed in quotation marks. Integer, List, Define List must be a numeric list. LatticeMico32 Hardware Developer User Guide...
  • Page 89 Deletes the highlighted DDStruct setting from the list. Update Allows an element already added to the DDStruct to be modified. Highlight the element, make any desired changes to the element, and the click Update to activate the changes. LatticeMico32 Hardware Developer User Guide...

  • Page 90: Adding Software Files To Custom Components

    Performs a design-rule check of the new component. Save Adds the custom component to LatticeMico32. If the design-rule check fails, a message appears that warns you that the data to be saved contains errors and cannot be used in a platform. The component icon displays a small red “x” in the bottom left-hand corner.
  • Page 91  Platform library file type – These source files are compiled during the platform library build process and become part of the platform library archive. The functions in these source-code files can be overridden by LatticeMico32 Hardware Developer User Guide...
  • Page 92 Performs a design-rule check of the new component. Save Adds the custom component to LatticeMico32. If the design-rule check fails, a message appears that warns you that the data to be saved contains errors and cannot be used in a platform. The component icon displays a small red “x” in the bottom left-hand corner.

  • Page 93: Applying Changes

    This section explains how to create and use new custom components in the flow for VHDL users. To create a Verilog wrapper: 1. Create a component definition in VHDL that is LatticeMico32-compliant, for example, using WISHBONE. Refer to the section “WISHBONE Interconnect Architecture” in the LatticeMico32 Processor Reference Manual for information.
  • Page 94 Translate Design process. If there are any bidirectional I/ Os in the custom VHDL component, you must declare them as black-box pads. Lattice Semiconductor FPGAs only have tristate buffers in their I/O cells. In a single-language implementation, the synthesis tool can reconcile multiple tristate I/O requests to a single tristate buffer.

  • Page 95: Pointing To The Correct .Ngo File

    VHDL-based component that was created in an earlier step. To point to the correct .ngo file: 1. Copy the .ngo file to the \soc directory, located in the LatticeMico32 platform project directory. 2. In Diamond, choose Project > Property Pages.

  • Page 96: Making Custom Components Available In Msb

    <component_name> folder – Contains the following files and directories:  <component_name>.xml – Contains the XML code required to attach your component to the LatticeMico32 processor.  document folder – Contains documentation file or files. At a minimum, this folder contains the <component_name>.htm file, which is an HTML file that is displayed in the Component Help view in the MSB main window.
  • Page 97 <component_name>Service.h). The service files must be implemented to support the LatticeMico32 initialization process. Each component must define a basic set of service functions that have been defined by the LatticeMico32 boot process.  rtl folder – Contains the verilog subfolder.

  • Page 98: Custom Component Example

    This example includes a custom component that uses a Verilog RTL implementation file and software driver files as sources, typical sources for importing a custom component. Verilog RTL Implementation The Verilog (.v) source file for this example is shown in Figure 47. LatticeMico32 Hardware Developer User Guide...
  • Page 99 (never asserted) wb_rty,//-------------------Retry qualifier from slave (never asserted) //--------------------------------------------------------------------- // Interrupt line (active-high) that will be connected to the // processor. Not used but for demonstrating custom component // connectivity. LatticeMico32 Hardware Developer User Guide...
  • Page 100 [31:0] read_data;//---------------------reg data mux (reads) // assign register-select signals: // since there are only two registers, use bit-2 of the // address bus since addressing is word addressing for LatticeMico32 LatticeMico32 Hardware Developer User Guide...
  • Page 101 ( (reg_00_sel == 1'b1) && (wb_we == 1'b1) && (write_ack == 1'b0) ) begin if( wb_sel[0] == 1'b1 ) begin reg_00[7:0] <= wb_master_data[7:0]; if( wb_sel[1] == 1'b1 ) begin reg_00[15:8] <= wb_master_data[15:8]; if( wb_sel[2] == 1'b1 ) begin reg_00[23:16] <= wb_master_data[23:16]; LatticeMico32 Hardware Developer User Guide...
  • Page 102 = read_ack | write_ack; // assign component data assign wb_slave_data = read_data; // unused rty/err assign wb_rty = 1'b0; assign wb_err = 1'b0; // unused interrupt (active-high) assign wb_intr = 1'b0; assign out_pins = reg_00[7:0]; endmodule LatticeMico32 Hardware Developer User Guide...
  • Page 103 #endif /* __cplusplus */ /* device initialization function */ void init_reg_device( struct st_reg_device * ctx ); /* macro for reading/writing registers */ #define REG_DEV_REGISTER(BASE,OFFSET) *((volatile unsigned int *)(BASE + OFFSET)) #ifdef __cplusplus #endif /* __cplusplus */ #endif//_REG_COMP_HEADER_FILE_ LatticeMico32 Hardware Developer User Guide...
  • Page 104 Input WISHBONE strobe signal wb_we Input WISHBONE write-enable signal wb_adr Input WISHBONE address wb_master_data Input WISHBONE data from master wb_sel Input WISHBONE byte-select signal wb_ack Output WISHBONE ack signal wb_err Output WISHBONE error signal LatticeMico32 Hardware Developer User Guide...
  • Page 105 General read/write register; power-up value is set to the clock frequency specified as an RTL parameter on instantiation. 0x08 reg_08 General read/write register; power-up value is set to the constant specified as an RTL parameter on instantiation. LatticeMico32 Hardware Developer User Guide...

  • Page 106: Adding The Custom Component

    In this section, you will add the example custom component to the MSB graphical user interface. It is assumed that the sources are located in the C:\Demo\MyComponent\ folder, as shown in Figure 52. The intended destination repository for the custom component is C:\Demo\MSBComponents. LatticeMico32 Hardware Developer User Guide...
  • Page 107 2. Enter the component information, as shown in Figure 54. Warning The display name should not be the same as that of any of the design RTL files. It also cannot be the same as the name of the top module file. LatticeMico32 Hardware Developer User Guide...
  • Page 108 7. Specify the component’s external ports, as shown in Figure 59. 8. Specify the component’s RTL files, as shown in Figure 60. 9. Specify the component’s RTL parameters, as shown in Figure 61. LatticeMico32 Hardware Developer User Guide...
  • Page 109 : Custom Component Example REATING USTOM OMPONENTS IN ATTICE YSTEM Figure 55: Specifying the WISHBONE Slave Port Signals for the Component LatticeMico32 Hardware Developer User Guide...
  • Page 110 : Custom Component Example REATING USTOM OMPONENTS IN ATTICE YSTEM Figure 56: Specifying the WISHBONE Clock Signal for the Component LatticeMico32 Hardware Developer User Guide...
  • Page 111 : Custom Component Example REATING USTOM OMPONENTS IN ATTICE YSTEM Figure 57: Specifying the WISHBONE Reset Signal for the Component LatticeMico32 Hardware Developer User Guide...
  • Page 112 : Custom Component Example REATING USTOM OMPONENTS IN ATTICE YSTEM Figure 58: Specifying the Interrupt Signal for the Component LatticeMico32 Hardware Developer User Guide...
  • Page 113 : Custom Component Example REATING USTOM OMPONENTS IN ATTICE YSTEM Figure 59: Specifying the External Port for the Component LatticeMico32 Hardware Developer User Guide...
  • Page 114 Figure 61 shows the steps required for adding a GUI widget for configuring the reg_08 register’s value when you instantiate the custom component in a platform. Note You might need to adjust the default size for your component. LatticeMico32 Hardware Developer User Guide...
  • Page 115 : Custom Component Example REATING USTOM OMPONENTS IN ATTICE YSTEM Figure 61: Adding a Configuration Widget for the reg_08 Register LatticeMico32 Hardware Developer User Guide...
  • Page 116 The example custom component requires a data structure like that shown in Figure 63. Figure 63: Data Structure Required for Creating Custom Component typedef struct st_reg_device { unsigned int reg_08_value; unsigned int b_addr; } reg_device; LatticeMico32 Hardware Developer User Guide...
  • Page 117 13. Add the device driver’s header file (.h), which is a standard header file that can be included in a user application, as shown in Figure 67. 14. Click DRC to check for any errors. 15. Click Save to save the custom component. LatticeMico32 Hardware Developer User Guide...

  • Page 118: Output

    If you want to modify the RTL once this component is created—for example, to fix a bug—you must modify the copied files, not the original source files. LatticeMico32 Hardware Developer User Guide...
  • Page 119 : Custom Component Example REATING USTOM OMPONENTS IN ATTICE YSTEM Figure 66: Adding the C Source File LatticeMico32 Hardware Developer User Guide...
  • Page 120 : Custom Component Example REATING USTOM OMPONENTS IN ATTICE YSTEM Figure 67: Adding the Device Driver Header (.h) File Figure 68: Custom Component in MSB Available Components View LatticeMico32 Hardware Developer User Guide...
  • Page 121 : Custom Component Example REATING USTOM OMPONENTS IN ATTICE YSTEM Figure 69: Add Reg_Comp Dialog Box Figure 70: Directories Created by the MSB Graphical User Interface LatticeMico32 Hardware Developer User Guide...
  • Page 122 : Custom Component Example REATING USTOM OMPONENTS IN ATTICE YSTEM LatticeMico32 Hardware Developer User Guide...

  • Page 123: Glossary

    C++ SPE uses the bundled GNU C/C++ tool chain (compiler, assembler, linker, debugger, and other utilities such as objdump) customized for the LatticeMico32 process. It uses the same graphical user interface as MSB. component information structure declaration A component information structure declaration is specified as part of the .xml file and is copied into .msb...
  • Page 124 The LatticeMico System interface is based on the Eclipse environment. .elf file An .elf file is a file in executable linked format that contains the software application code written in C/C++SPE. LatticeMico32 Hardware Developer User Guide...
  • Page 125 The LatticeMico System contains three default perspectives: the MSB perspective, the C/C++ perspective, and the Debug perspective. LatticeMico32 Hardware Developer User Guide...
  • Page 126 Source folders are the folders you may have on your system or in the project folder that contain input for a project. Input might include source files and resource files to help enhance or to initially establish a LatticeMico32 project. LatticeMico32 Hardware Developer User Guide...
  • Page 127 (2) The <comp_name>.xml files contain code declarations referred to as component instance definitions that define the structure of each component. These files reside in the <install_dir>/components folder. On build generation, this information is copied into the .msb f by MSB. LatticeMico32 Hardware Developer User Guide...
  • Page 128 LOSSARY LatticeMico32 Hardware Developer User Guide...

  • Page 129: Index

    Board Frequency parameter 19 "Hello World" application 40 breakpoints definition 117 watchpoints 121 active perspective 9 Add LatticeMico32 dialog box 20 addresses C/C++ perspective 9 assigning component 27 see also C/C++ SPE automatically assigning 28 C/C++ Software Project Environment see C/C++...
  • Page 130 External Ports tab 61 DMA controller see LatticeMico DMA controller Master/Slave Ports tab 56 document icon 20 opening 52 double-buffered bidirectional ports 34 Parameters tab 79 DRC 21 purpose 52 RTL Files tab 72 saving settings 90 LatticeMico32 Hardware Developer User Guide...
  • Page 131 LatticeMico UART document 5 definition 119 LatticeMico32 Processor Reference Manual IP cores 14 document 5 IP Design Flow 14 LatticeMico32 Software Developer User Guide IPexpress 14 document 5 IRQ see interrupt request priorities LatticeMico32/DSP Development Board User’s Guide document 5...
  • Page 132 MSB 30 switching to new 9 serial peripheral interface see LatticeMico SPI physical design rule checks see DRC flash controller pin constraints 38 setting constraints 36 platform shared-bus arbitration scheme 21 adding peripherals to 19 LatticeMico32 Hardware Developer User Guide...
  • Page 133 31 importing file into Diamond 36 importing file on Windows 37 instantiation template 32 shared bus connection pattern in .v file 33 specifying in MSB 18 wrapper around custom components 61 .vhd file 32 LatticeMico32 Hardware Developer User Guide...

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