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Hardware Description
E2969-91020
Clock Distribution
The following figure shows an overview of the clock distribution.
Reference Clock
The clock is generated using the system-provided 100 MHz PCI Express
reference clock. However, there is also the possibility to use the internal
clock oscillator if for some reason the system clock cannot be used. The
reference clock and the internal clock are used for the internal logic of
the PTC as well as for providing the clock to the DUT plugged onto the
PTC.
To change the clock source use the administration tool ptcdiag on the
administration PC connected to the PTC through USB.
To switch to the internal clock, enter the command: ptcdiag –w 0xd818 0
To switch back to the PCI Express reference clock, enter the command:
ptcdiag –w 0xd818 1
After the next power down, the PCI Express reference clock will be used
again automatically.
NOT E
With SSC in the target system external clock must be used. This is the
DUT (100 MHz)
PLL and
Divider
S W
Control
100 MHz
Appendix
Internal
Logic
Internal
O scillator
5-7
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