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3 SPECIFICATIONS
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(c) Bit 2: Normal Operation Active
Bit 2 checks the operating status.
Bit 2 turns OFF when the QJ71AS92 is in the normal operation status after
module ready (X0) has turned ON. (This bit corresponds to the input signal
X6.)
(d) Bit 3: Configuration Mode Active
Bit 3 checks the operation mode.
Bit 3 turns ON when the QJ71AS92 is in the configuration mode. Bit 3 turns
OFF when the QJ71AS92 is in the mode other than configuration mode.
(This bit corresponds to the input signal X7.)
(e) Bit 4 to 7
(f)
Bit 8 to 11 : Input data from slave address 2A
(g) Bit 12 to 15 : Input data from slave address 3A
TIP
• 0 is stored as the input from a non-connected slave.
• As the input from the slave address corresponding to the analog slave, the data
used for communication is stored.
(2) Input data from slave address 4A to 31A (Buffer memory address
1
to 7
: Un\G1 to Un\G7)
H
H
The input data from the AS-i Ver. 2.11-compatible (Group A) and AS-i Ver. 2.04-
compatible I/O slaves are stored.
Bit
15
1
7A
H
2
11A
H
3
15A
H
4
19A
H
5
23A
H
6
27A
H
7
31A
H
Example:
Bit
15
1
I3
I2
H
TIP
• 0 is stored as the input from a non-connected slave.
• As the input from the slave address corresponding to the analog slave, the data
used for communication is stored.
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: Input data from slave address 1A
to
12 11
To
6A
10A
14A
18A
22A
26A
30A
to
12 11
to
I1
I0
Slave address 7A
I0 = ON
I1 = OFF
I3
I2
I1
I0
I2 = ON
I3 = ON
MELSEC-Q
8 7
to
4 3
5A
9A
13A
17A
21A
25A
29A
ON: 1, OFF: 0
8 7
to
4 3
b 15
14
When
1
1
H
to
0
4A
8A
12A
16A
20A
24A
28A
to
0
13
12
1
0
1
3 - 15
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