Npe-100, Npe-150, And Npe-200 Memory Information - Cisco NPE-175 Installation And Configuration Manual

NPE-100, NPE-150, and NPE-200 Memory Information

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NPE-100, NPE-150, and NPE-200 Memory Information
To determine the memory configuration of your NPE, use the show version command.
The following example shows an NPE-150 installed in a Cisco 7206 router:
router(boot)# show version
Cisco Internetwork Operating System Software
IOS (tm) 7200 Software (C7200-J-M), Released Version 11.1(17)CA
Copyright (c) 1986-1999 by cisco Systems, Inc.
Compiled Sun 21-Apr-96 04:10
Image text-base:0x60010890, data-base:0x605F0000
(display text omitted)
cisco 7206 (NPE150) processor with 12288K/4096K bytes of memory.
R4700 processor, Implementation 33, Rev 1.0, (Level 2 Cache)
Last reset from power-on
(display text omitted)
Use the following sections for information about memory specifications and configurations for the
NPE-100, NPE-150, and NPE-200.
Note To prevent DRAM errors in the NPE-100, NPE-150, or NPE-200, and to ensure that your system
initializes correctly at startup, DRAM bank 0 (socket U18 and U25, or U11 and U25) must contain no
fewer than two SIMMs of the same type. You may also install two SIMMs of the same type in bank 1
(socket U4 and U12, or U42 and U52); however, bank 0 must always contain the two largest SIMMs.
Network Processing Engine and Network Services Engine Installation and Configuration
1-6
OTP—one time programmable
Primary, secondary, tertiary cache—Hierarchical cache memory storage based on the proximity of
the cache to the core of the processor. Primary cache is closest to the processor core and has the
fastest access. Secondary cache has slower access than primary cache, but faster access than tertiary
cache.
RAM—random-access memory
RISC—reduced instruction set computing
ROM—read-only memory
SIMM—single in-line memory module
SDRAM—synchronous dynamic random-access memory
SDRAM-fixed—SDRAM of a fixed size or quantity; can be replaced, but not upgraded
SODIMM—small outline dual in-line memory module
SRAM—static random-access memory
Unified cache—Instruction cache and data cache are combined. For example, a processor may have
primary cache with separate instruction and data cache memory, but unified secondary cache.
Chapter 1 NPE-100, NPE-150, and NPE-200 Overview
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