HP Vectra VL800 Technical Reference Manual page 127

Checkpoint
Code
0Ah Initialize CPU registers
0Bh Enable CPU cache
0Ch Initialize caches to initial POST values
0Eh Initialize I/O component
0Fh Initialize the local bus IDE
10h Initialize Power Management
11h Load alternate registers with initial POST values
12h Restore CPU control word during warm boot
13h Initialize PCI Bus Mastering devices
14h Initialize keyboard controller
16h BIOS ROM checksum
17h Initialize cache before memory autosize
18h 8254 timer initialization
1Ah 8237 DMA controller initialization
1Ch Reset Programmable Interrupt Controller
20h Test RDRAM refresh
22h Test 8742 keyboard controller
24h Set ES segment register to 4 GB
26h Enable A20 line
28h Autosize RDRAM
29h Initialize POST Memory Manager
2Ah Clear 512 KB base RAM
2Ch RAM failure on address line
RAM failure on data bits xxxx
2Eh
2Fh Enable cache before system BIOS shadow
POST Routine Description
1
1
of low byte of memory bus
7 Tests and Error Messages
Order in Which POST Tests Are Performed
Beep
Code
3
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