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Modifications
6
Modifications
By default, the ALM2403Q1EVM is populated with both amplifiers set to the inverting configuration.
However, for flexibility, the PCB layout has additional unpopulated passive component footprints, and
additional input connections. These additional component footprints in the layout allow the user to change
the ALM2403Q1 circuit to other common configurations, such as the buffer and noninverting amplifier
configurations. For a full schematic of the ALM2403Q1EVM, see
7
Schematic, PCB Layout, and Bill of Materials
This section contains the schematic, bill of materials, and references for the ALM2403Q1EVM.
7.1
Schematic
Figure 5
illustrates the EVM schematic.
TP1
J1
1
IN1-
TP2
J2
GND
1
IN1+
DNP
VCC_S
TP4
TP5
GND
GND
R8
10.0k
GND
R12
GND
GND
10.0k
TP7
J4
GND
GND
1
IN2+
DNP
TP10
J6
GND
1
IN2-
TP11
TP12
GND
GND
GND
GND
GND
NOTE: DNP components are not populated.
7.2
PCB Layout
The ALM2403Q1EVM is a four-layer PCB design.
The top layer consists of all signal path traces, and is poured with a solid ground plane. A symmetrical
board layout is used on amplifier 1 and amplifier 2 to keep good performance matching. Decoupling
capacitors C4, C5, and C10 are positioned on the top layer as close as possible to the power supply pins
of the device. The second internal layer is a dedicated solid GND plane. Independent vias are placed at
the ground connection of every component to provide a low-impedance path to ground. The third internal
layer and the bottom layer route the power-supply connections.
8
ALM2403-Q1 Evaluation Module
C1
R1
DNP
DNP
GND
C3
R4
10.0k
150nF
DNP
R5
50V
C7
R6
DNP
C6
DNP
150nF
DNP
50V
R7
GND
DNP
C9
R9
0
R11
C11
0
100nF
DNP
C13
GND
DNP
C15
R13
R14
DNP
150nF
DNP
C16
50V
DNP
R15
C17
R16
10.0k
150nF
50V
GND
DNP
DNP
R18
C20
VCC_S
R20
TP13
10.0k
J8
R21
1
2
10.0k
3
TP14
GND
GND
GND
GND
Figure 5. ALM2403Q1EVM Schematic
Copyright © 2020, Texas Instruments Incorporated
Figure
C2
R2
DNP
DNP
R3
VCC_S
24.9k
VCC_S
C4
100nF
U1
GND
GND
11
VCC
12
VCC
1
IN1-
13
OUT1
A1
2
IN1+
EN
VCC_S
10
VCC
4
IN2+
9
OUT2
A2
5
IN2-
EN
8
NC
3
7
SH_DN/OTF
EN
NC
Thermal
14
Shutdown
GND
6
15
GND
GND
ALM2403QPWPRQ1
GND
R17
24.9k
DNP
DNP
R19
C21
GND
C22
J7
2
1
Figure 6
to
Figure 10
5.
C5
100nF
TP3
OUT1
C8
DNP
DNP
R10
C10
GND
50V
C12
DNP
TP6
100nF
GND
OUT2
C14
DNP
TP8
TP9
GND
GND
GND
GND
GND
GND
J5
1
2 3
D1
VCC_S
C18
C19
10uF
100nF
GND
show the PCB layer illustrations.
SBOU236 – February 2020
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J3
1
2
3
4
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