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Schematic Diagrams
DDR 1.35V/0.75VS
D
Sheet 41 of 57
DDR 1.35V/0.75VS
12,14,15,3,42,43,44
C
B
17
A
17
B - 42 DDR 1.35V/0.75VS
5
4
1.35V/0.75VS
VDDQ_R
PC51
PC51
VTT_MEM
10u_10V_Y5V_08
10u_10V_Y5V_08
23
2A
PJ1
PJ1
2
1
24
VTT_MEM
2mm
2mm
1
DEFAULT
PC45
PC45
PC47
PC47
PC46
PC46
Short
PR59
PR59
22u_6.3V_X5R_08
22u_6.3V_X5R_08
*10u_10V_Y5V_08
*10u_10V_Y5V_08
*10u_10V_Y5V_08
*10u_10V_Y5V_08
0_06
0_06
2
3
PR139
PR139
0_06
0_06
VDDQ_R
PR140
PR140
*0_04
*0_04
4
5V
PR144
PR144
*0_04
*0_04
PC49
PC49
0.1u_10V_X5R_04
0.1u_10V_X5R_04
5
6
PR141
PR141
0_06
0_06
5V
8
PR60
PR60
*22_04
*22_04
VTT_MEM
9
PQ27
PQ27
G
SUSB
SUSB
*MTN7002ZHS3
*MTN7002ZHS3
PJ2
PJ2
*CV-40mil
*CV-40mil
PR155
PR155
5V
*10K_1%_04
*10K_1%_04
PR154
PR154
10K_1%_06
10K_1%_06
R700
R700
10K_04
10K_04
VTTEN
5V
C162
C162
Q8
Q8
SUSB
G
0.1u_16V_Y5V_04
0.1u_16V_Y5V_04
MTN7002ZHS3
MTN7002ZHS3
FOR H97 ),
J0TABLE
Z97),
3.3V
PR65
PR65
PR68
PR68
150K_1%_04
150K_1%_04
64.9K_1%_04
64.9K_1%_04
3.3V
PR64
PR64
100K_04
100K_04
D
D
PR146
PR146
PQ9A
PQ9A
2
DEFAULT
G
G
MTDN7002ZHS6R
MTDN7002ZHS6R
*100K_04
*100K_04
S
S
3.3V
PJ23
PJ23
D
D
PC50
PC50
1
2
5
G
G
PCH_GPIO45
S
S
1u_6.3V_X5R_04
1u_6.3V_X5R_04
1mm
1mm
PQ9B
PQ9B
PR66
PR66
Short
MTDN7002ZHS6R
MTDN7002ZHS6R
100K_04
100K_04
PR151
PR151
D
D
PQ10A
PQ10A
*100K_04
*100K_04
3.3V
2
G
G
MTDN7002ZHS6R
MTDN7002ZHS6R
S
S
DEFAULT
PR145
PR145
PJ24
PJ24
*10K_04
*10K_04
D
D
PC53
PC53
1
2
5
G
G
PCH_GPIO46
S
S
1u_6.3V_X5R_04
1u_6.3V_X5R_04
1mm
1mm
Short
PQ10B
PQ10B
PR150
PR150
MTDN7002ZHS6R
MTDN7002ZHS6R
*100K_04
*100K_04
5
4
3
PD4
PD4
PQ26
PQ26
A
C
MDU1516
MDU1516
5V
ULTRASO-8
ULTRASO-8
PU4
PU4
RB0540S2
RB0540S2
G5616
G5616
G
PC128
PC128
0.1u_10V_X5R_04
0.1u_10V_X5R_04
22
VLDOIN
VBST
PR67
PR67
21
VTT
DRVH
0_06
0_06
20
VTTGND
LL
PR69
PR69
19
VTTSNS
DRVL
PQ31
PQ31
0_06
0_06
*MDU1512
*MDU1512
18
ULTRASO-8
ULTRASO-8
GND
PGND
17
PR156
PR156
0_06
0_06
CS_GND
5V
16
PR158
PR158
10K_1%_06
10K_1%_06
G
MODE
CS
15
PVCC5
14
PR157 2.2_04
PR157 2.2_04
VTTREF
VCC5
13
PC55
PC55
PC54
PC54
COMP
PGOOD
3.3V
11
VDDQSNS
S5
R224
R224
10
*10K_04
*10K_04
VDDQSET
S3
R223
R223
*0_04
*0_04
R705
R705
47K_04
47K_04
5V
Q47
Q47
R720
R720
100K_04
100K_04
G
MTN7002ZHS3
MTN7002ZHS3
BCDE
8mil
Q45
Q45
PJ25
PJ25
G
*CV-40mil
*CV-40mil
17,31,32
SUSC#
MTN7002ZHS3
MTN7002ZHS3
22,23,24,30,43
DD_ON#
VDDQSET_R
PR178
PR178
PR152
PR152
0_04
0_04
5V
PR147
PR147
PR62
PR62
42.2K_1%_04
42.2K_1%_04
PR61
PR61
*41.2K_1%_04
*41.2K_1%_04
100K_04
100K_04
PQ28
PQ28
G
PR149
PR149
PQ29
PQ29
MTN7002ZHS3
MTN7002ZHS3
0_04
0_04
G
17
PCH_GPIO60
PJ4
PJ4
PJ3
PJ3
MTN7002ZHS3
MTN7002ZHS3
*CV-40mil
*CV-40mil
*CV-40mil
*CV-40mil
PR153
PR153
10K_04
10K_04
16,17,20,26,31,32,34,37,40,42,43,45
11,17,2,22,24,25,26,27,3,30,36,37,39,40,43,44
3
2
1
VIN
PC120
PC120
PC121
PC121
PC122
PC122
+
+
PC127
PC127
15u_25V_6.3*4.4_C
15u_25V_6.3*4.4_C
1.35V
Short
VDDQ_R
PL6
PL6
1.0UH_10*10*4.5
1.0UH_10*10*4.5
PJ22
PJ22
16A
1
2
1
PCB Footprint = TMPC1004H
PCB Footprint = TMPC1004H
8mm
8mm
PC125
PC125
DEFAULT
PC113
PC113
PC112
PC112
+
+
+
+
PQ30
PQ30
MDU1512
MDU1512
*1000p_50V_X7R_04
*1000p_50V_X7R_04
ULTRASO-8
ULTRASO-8
PR148
PR148
G
*5.1_06
*5.1_06
PR134
PR134
VDDQ
0_06
0_06
DDR1.5V_PWRGD
DDR1.5V_PWRGD
16
PC117
PC117
PC116
PC116
0.1u_16V_Y5V_04
0.1u_16V_Y5V_04
0.1u_16V_Y5V_04
0.1u_16V_Y5V_04
PR63
PR63
8.2K_1%_04
8.2K_1%_04
PC52
PC52
*100p_50V_NPO_04
*100p_50V_NPO_04
C169
C169
Q46
Q46
G
0.1u_10V_X7R_04
0.1u_10V_X7R_04
*MTN7002ZHS3
*MTN7002ZHS3
3.3V
3.3V
R230
R230
100K_04
100K_04
R695
R695
DDR1.5V_PWRGD
100K_04
100K_04
Q43
Q43
MTN7002ZHS3
MTN7002ZHS3
G
R674
R674
0_04
0_04
VDDQSET
100_04
100_04
B
Q42
Q42
VDDQ
BTN3904
BTN3904
DDR GPIO OUTPUT VOLTAGE SELECT
PCH_GPIO60
PCH_GPIO45
HOST_ALERT#2
ICH_GPIO46
ICC_EN#
DDR Vout
0
0
0
1.65V
0
0
1
1.60V
0
1
0
1.55V
0
1
1
1.50V(5FG)
1
0
0
1.50V(FGHI)
1
0
1
1.45V
1
1
0
1.40V
1
1
1
1.35V
VDD3
Title
Title
Title
[41] DDR 1.35V/0.75VS
[41] DDR 1.35V/0.75VS
[41] DDR 1.35V/0.75VS
15,22,23,24,27,30,42,43,44,46,47
5V
11,15,29,40,42,43,44,45,46,47
VIN
10,3,5,7,8,9
VDDQ
Size
Size
Size
Document Number
Document Number
Document Number
6-71-P7500-D03A
6-71-P7500-D03A
6-71-P7500-D03A
3.3V
A3
A3
A3
SCHEMATIC1
SCHEMATIC1
SCHEMATIC1
10,7,8,9
VTT_MEM
Date:
Date:
Date:
Wednesday, October 29, 2014
Wednesday, October 29, 2014
Wednesday, October 29, 2014
Sheet
Sheet
Sheet
41
41
41
2
1
D
2
VDDQ
EMI
C
B
A
Rev
Rev
Rev
3.0
3.0
3.0
of
of
of
58
58
58
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