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Schematic Diagrams
Processor 4/5
D
Sheet 5 of 57
Processor 4/5
C
B
A
B - 6 Processor 4/5
5
4
Haswell Processor 4/7 ( DISPLAY,FDI )
HASWELL
HASWELL
U42D
U42D
?
?
E17
DDIB_TXB[0]
F17
DDIB_TXB#[0]
F18
D16
DDIB_TXB[1]
FDI_CSYNC
FDI_CSYNC
19
G18
DDIB_TXB#[1]
D18
FDI_INT
FDI_INT
19
G19
DDIB_TXB[2]
H19
DDIB_TXB#[2]
F20
R4
R480
R480
24.9_1%_04
24.9_1%_04
DDIB_TXB[3]
DP_COMP
G20
DDIB_TXB#[3]
U5
SSC_DPLL_REF_CLKN
R492
R492
*0_04
*0_04
SSC_DPLL_REF_CLK#
D19
U6
SSC_DPLL_REF_CLKP
R496
R496
*0_04
*0_04
DDIC_TXC[0]
SSC_DPLL_REF_CLK
E19
DDIC_TXC#[0]
C20
E16
EDP_DISP_UTIL
DDIC_TXC[1]
EDP_DISP_UTIL
D20
DDIC_TXC#[1]
K11
RSVD_TP_K11
D21
J12
DDIC_TXC[2]
RSVD_TP_J12
E21
DDIC_TXC#[2]
C22
D22
DDIC_TXC[3]
B14
DDIC_TXC#[3]
FDI0_TX0#[0]
A14
FDI0_TX0[0]
B15
DDID_TXD[0]
C15
C13
DDID_TXD#[0]
FDI0_TX0#[1]
A16
B13
DDID_TXD[1]
FDI0_TX0[1]
B16
DDID_TXD#[1]
B17
DDID_TXD[2]
C17
DDID_TXD#[2]
A18
DDID_TXD[3]
B18
DDID_TXD#[3]
4 OF 10
4 OF 10
SSC CLOCK TERMINATION STUFF
ONLY WHEN SSC CLOCK NOT USED
3H993821-4M41-02H
3H993821-4M41-02H
REV = 1.1
REV = 1.1
?
?
CPU SOCKET -- LGA1150
VCCIO_OUT
V_VCCDDQ
VDDQ
R497
R497
R493
R493
DEFAULT
1
2
PJ21
PJ21
*5mm
*5mm
C579
C579
C580
C580
*0.1u_10V_X5R_04
*0.1u_10V_X5R_04
*0.1u_10V_X5R_04
*0.1u_10V_X5R_04
V_VCCDDQ
VALUE
330uF_2.5V_6.6*6.6*4.2
(6-09-3371P-190)
C536
C536
C531
C531
C537
C537
+
+
C568
C568
+
+
C581
C581
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
*330u_2.5V_V_A
*330u_2.5V_V_A
*330u_2.5V_V_A
*330u_2.5V_V_A
C541
C541
C576
C576
C577
C577
C525
C525
C578
C578
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
C572
C572
C573
C573
C574
C574
C575
C575
C526
C526
22u_6.3V_X5R_08
22u_6.3V_X5R_08
22u_6.3V_X5R_08
22u_6.3V_X5R_08
22u_6.3V_X5R_08
22u_6.3V_X5R_08
22u_6.3V_X5R_08
22u_6.3V_X5R_08
*22u_6.3V_X5R_08
*22u_6.3V_X5R_08
22Ux9
CPU
C538
C538
C533
C533
C534
C534
C529
C529
C539
C539
22u_6.3V_X5R_08
22u_6.3V_X5R_08
22u_6.3V_X5R_08
22u_6.3V_X5R_08
22u_6.3V_X5R_08
22u_6.3V_X5R_08
*22u_6.3V_X5R_08
*22u_6.3V_X5R_08
*22u_6.3V_X5R_08
*22u_6.3V_X5R_08
5
4
3
VCCIOA_OUT
CLK_DP_N
21
CLK_DP_P
21
R504
R504
6.04K_1%_04
6.04K_1%_04
VCCST_PWRGD
16,17,31
PM_PCH_PWROK
R505
R505
2.67K_1%_04
2.67K_1%_04
10K_04
10K_04
SSC_DPLL_REF_CLKP
10K_04
10K_04
SSC_DPLL_REF_CLKN
47W->85A
VCORE
22Ux18
C38
C38
C511
C511
C516
C516
C521
C521
C571
C571
*22u_6.3V_X5R_08
*22u_6.3V_X5R_08
C532
C532
C527
C527
C540
C540
C535
C535
*22u_6.3V_X5R_08
*22u_6.3V_X5R_08
*22u_6.3V_X5R_08
*22u_6.3V_X5R_08
*22u_6.3V_X5R_08
*22u_6.3V_X5R_08
*22u_6.3V_X5R_08
*22u_6.3V_X5R_08
10,3,41,7,8,9
3,46,47,6
3,46,6
2,3
3
2
1
U42H
U42H
?
?
HASWELL
HASWELL
K12
REV = 1.1
REV = 1.1
RSVD_TP_K12
J13
RSVD_TP_J13
P37
RSVD_TP_P37
AY18
N38
RSVD_AY18
RSVD_TP_N38
AW24
RSVD_AW24
AW23
R36
RSVD_AW23
RSVD_TP_R36
AV29
C39
RSVD_AV29
RSVD_TP_C39
AV24
RSVD_AV24
AU39
U35
RSVD_AU39
VSS_U35
AU27
P40
RSVD_AU27
VSS_P40
AU1
RSVD_AU1
AT40
R38
AK20
RSVD_AT40
VSS_R38
T37
RSVD_AK20
VSS_T37
Y7
V34
FC_Y7
VSS_V34
T34
RSVD_T34
R34
R39
RSVD_R34
VSS_R39
J40
RSVD_J40
J17
T38
RSVD_J17
VSS_T38
J15
U36
RSVD_J15
VSS_U36
H12
P39
RSVD_H12
VSS_P39
T36
VSS_T36
R37
VSS_R37
J14
VSS_J14
N36
RSVD_TP_N36
8 OF 10
8 OF 10
3H993821-4M41-02H
3H993821-4M41-02H
?
?
CPU SOCKET -- LGA1150
CPU
C517
C517
C518
C518
C51
C51
C41
C41
C37
C37
C509
C509
C523
C523
C524
C524
C39
C39
C515
C515
C514
C514
C512
C512
C510
C510
C528
C528
C513
C513
C520
C520
C522
C522
C36
C36
Title
Title
Title
VDDQ
[05] Processor 4/5-DISPLAY
[05] Processor 4/5-DISPLAY
[05] Processor 4/5-DISPLAY
VCORE
6
V_VCCDDQ
Size
Size
Size
Document Number
Document Number
Document Number
Rev
Rev
Rev
VCCIO_OUT
6-71-P7500-D03A
6-71-P7500-D03A
6-71-P7500-D03A
A3
A3
A3
SCHEMATIC1
SCHEMATIC1
SCHEMATIC1
VCCIOA_OUT
Date:
Date:
Date:
Wednesday, October 29, 2014
Wednesday, October 29, 2014
Wednesday, October 29, 2014
Sheet
Sheet
Sheet
5
5
5
of
of
of
58
58
58
2
1
D
C
B
A
3.0
3.0
3.0
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