Tps7A57Evm-056 Schematics; Figure 4-1. Schematic - Texas Instruments TPS7A57EVM-056 User Manual

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4 TPS7A57EVM-056 Schematics

Figure 4-1 and Figure 4-2 illustrate schematics for the TPS7A57EVM-056 and the onboard load transient circuit, respectively.
J9
J16 VIN_SNS1
Min Vin= 0.7V 2
1
Max Vin= 6.0V
TP3
J 10
TP6
J 11
Vbia s
TP7
J 12
GND
J4
J5
1
1
GND
GND
2
2
EN
CP_EN
3
3
Vin
Vin
5-146128-1
5-146128-1
SBVU075 – APRIL 2022
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Vin
1 C2
C3 C4
47µF
25V 10uF
22uF
0805
C18
1210
TP2
5.5V
47000µF
TP9
CP_EN
Vbia s
NR
C9
C8
10µF 4.7µF
0805 1210
C10
TP8
4.7µF
16V
R3
2.00M
GND

Figure 4-1. Schematic

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TP15
TP1
TP S 7A5701RTE
U1
TP14
1 9
IN OUT
2 10
IN OUT
3 11
IN OUT
4 12
IN OUT
J2
S NS
5 13
BIAS SNS
R1
EN 14 PG
PG
16
100k
EN
7
REF REF
15 GND
CP_EN
6
GND
8 17
NR/SS Thermal_Pad
TPS7A5701RTET
TP5
J3
61031221121
R2
2.00M
TPS7A57EVM-056 Schematics
TP16
Vout
C1
C5 C6 C7 47µF
J1 22µF 6.3V 25V
10V 1uF 22uF
1
1
2
VOUT_SNS
TP4
TPS7A57EVM-056 Evaluation Module
J 13
J17
Min Vout=0.5V
1
2
Max Vout=5V
Max Iout=5V
J 14
11