Supermicro SuperWorkstation SYS-530T-I User Manual page 39

4-pin BMC External I
2
A system Management Bus header for IPMI 2.0 is located at JIPMB1. Connect the appropriate
cable here to use the IPMB I
definitions.
Chassis Intrusion
A Chassis Intrusion header is located at JL1 on the motherboard. Attach the appropriate cable
from the chassis to inform you of a chassis intrusion when the chassis is opened. Refer to
the table below for pin definitions.
SGPIO Headers
Two Serial Link General Purpose Input/Output headers (I-SGPIO1, I-SGPIO2) are located on
the motherboard. They are used to communicate with the enclosure management chip on the
backplane support the onboard I-SATA 3.0 ports. Refer to the table below for pin definitions.
C Header
C connection on your system. Refer to the table below for pin
2
External I C Header
2
Pin Definitions
Pin# Definition
1 Data
2 Ground
3 Clock
4 P3V3 STBY
Chassis Intrusion
Pin Definitions
Pin# Definition
1 Intrusion Input
2 Ground
S-SGPIO Header
Pin Definitions
Pin# Definition Pin#
1 NC 2
3 Ground 4
5 Load 6
7 Clock 8
NC = No Connection
39
Chapter 4: Motherboard Connections
Definition
NC
Data
Ground
NC