CMOSTEK CMT2310A Manual page 31

High-performance sub-1ghz rf transceiver
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The interrupt mapping is listed in the table below. As INT 1 and INT 2 have the same mapping, it takes INT 1 as an
example in the table below.
Name
INT_MIX
ANT_LOCK
RSSI_PJD_VALID
PREAM_PASS
SYNC_PASS
ADDR_PASS
CRC_PASS
PKT_OK
PKT_DONE
SLEEP_TMO
RX_TMO
RX_FIFO_NMTY
RX_FIFO_TH
RX_FIFO_FULL
RX_FIFO_WBYTE
RX_FIFO_OVF
TX_DONE
TX_FIFO_NMTY
TX_FIFO_TH
TX_FIFO_FULL
STATE_IS_READY
STATE_IS_FS
STATE_IS_RX
STATE_IS_TX
LBD_STATUS
API_CMD_FAILED
API_DONE
TX_DC_DONE
ACK_RECV_FAILED
TX_RESEND_DONE
NACK_RECV
SEQ_MATCH
Table 18. CMT2310A Interrupt Mapping Table
INT1_SEL
Compounded interrupt, any one of the interrupts below is valid,
000000
INT_MIX will be valid.
Interrupt for antenna lock being accomplished after antenna
000001
diversity function running.
000010
Interrupt for RSSI and/or PJD being valid.
000011
Interrupt indicating successful receipt of Preamble.
000100
Interrupt indicating successful receipt of Sync Word.
000101
Interrupt indicating successful receipt of Addr.
000110
Interrupt indicating successful receipt and CRC check being passed.
000111
Interrupt indicating receipt of an entire and correct packet.
Indicates that the current data packet has been received with the
001000
occurring of one of the 4 cases below.
1.
A complete and correct packet is received.
2.
Manchester decoding error occurs and the decoding circuit
restarts automatically.
3.
NODE ID receiving error occurs and the decoding circuit
restarts automatically.
4.
A signal conflict is found and the decoding circuit does not
restart automatically but waits for the MCU to process.
001001
Interrupt indicating SLEEP timer timeout.
001010
Interrupt indicating RX timer timeout.
001011
Interrupt indicating RX FIFO being empty.
Interrupt indicating the unread content of RX FIFO exceeding FIFO
001100
TH.
001101
Interrupt indicating RX FIFO being full
001110
Interrupt generated every time a BYTE is written into RX FIFO, i.e.,
it is a pulse.
001111
Interrupt indicating RX FIFO being overflow
010000
Interrupt indicating TX completion.
010001
Interrupt indicating TX FIFO not being empty.
Interrupt indicating the unread content of TX FIFO exceeding FIFO
010010
TH.
010011
Interrupt indicating TX FIFO being full.
010100
Interrupt indicating that the current state is READY.
010101
Interrupt indicating that the current state is RFS or TFS.
010110
Interrupt indicating that the current state is RX.
010111
Interrupt indicating that the current state is TX.
Interrupt indicating that low voltage detection being active (VDD is
011000
lower than the set TH).
011001
Interrupt indicating API command execution error.
011010
Interrupt indicating API command completion.
011011
Interrupt for Duty Cycle TX mode complete
011100
Interrupt indicating ACK receiving failure.
011111
Interrupt for repeated TX complete
011110
Interrupt indicating receipt of NACK.
011111
Interrupt indicating successful serial number matching.
Rev 1.0E | Page31/50
Interrupt Descriptions
CMT2310A
Clearing Method
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By MCU
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