Lan Port Interface - Renesas CPU Board M3A-HS19 User Manual

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2.6 LAN Port Interface

An IEEE 802.3 compliant (MAC layer) Ethernet controller and an IEEE802.3/802.3u compliant (10/100 Mbps Ethernet
PHY) physical layer transceiver are embedded in the SH7619 MCU.
Figure 2.6.1 shows the block diagram of LAN port interface.
SH7619 (U1)
(MII)
ETC
MII-compliant signal
Rev.1.01 Oct 28, .2008
REJ10J1351-0101
3.3 V
LED1
Yellow
SPEED100#
LINK#
CRS#
DUPLEX#
TxP
TxM
PHY
RxP
RxM
EXRES1
TSTBUSA
CK_PHY
25.000 MHz-OSC
Figure 2.6.1 LAN Port Interface
LED2 LED3 LED4
Yellow Yellow
Yellow
3.3 VA
12.4 K(1%)
3 VAGND
Features and Specifications
2.6 LAN Port Interface
RJ-45 (J5)
1
TX +
2
TX −
3
TCT
4
RX +
5
RX −
6
RCT
7
8
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