Texas Instruments DLPC900 Programmer's Manual
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Texas Instruments DLPC900 Programmer's Manual

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DLPC900 Programmer's Guide
Programmer's Guide
Literature Number: DLPU018G
OCTOBER 2014 – REVISED APRIL 2022

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Summary of Contents for Texas Instruments DLPC900

  • Page 1 DLPC900 Programmer's Guide Programmer’s Guide Literature Number: DLPU018G OCTOBER 2014 – REVISED APRIL 2022...

  • Page 3: Table Of Contents

    2.3.2.1 Parallel Port Configuration..........................2.3.2.2 Input Data Channel Swap........................... 2.3.3 Input Source Commands............................35 2.3.3.1 Port and Clock Configuration..........................2.3.3.2 Input Source Configuration..........................DLPU018G – OCTOBER 2014 – REVISED APRIL 2022 DLPC900 Programmer's Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 4 5.5 I C Pass Through Read Example............................ A Register Quick Reference..............................A.1 I C Register Quick Reference............................87 A.2 Command Guide................................89 DLPC900 Programmer's Guide DLPU018G – OCTOBER 2014 – REVISED APRIL 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 5 Figure 2-3. Gamma Chart................................42 Figure 2-4. DLPC900 Single Controller System Block Diagram....................54 Figure 2-5. DLPC900 Dual Controller System Block Diagram....................Figure 2-6. Bit-Planes of a 24-Bit RGB Image...........................56 Figure 2-7. Bit Partition in a Frame for an 8-Bit Monochrome Image..................
  • Page 6 Table of Contents www.ti.com This page intentionally left blank. DLPC900 Programmer's Guide DLPU018G – OCTOBER 2014 – REVISED APRIL 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 7 ™ and E2E ™ are trademarks of Texas Instruments. ® is a registered trademark of Texas Instruments. All trademarks are the property of their respective owners. DLPU018G – OCTOBER 2014 – REVISED APRIL 2022 DLPC900 Programmer's Guide Submit Document Feedback...
  • Page 8 Trademarks www.ti.com This page intentionally left blank. DLPC900 Programmer's Guide DLPU018G – OCTOBER 2014 – REVISED APRIL 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...

  • Page 9: Read This First

    Read This First Preface Read This First About This Manual This document specifies the command and control interface to the DLPC900 controller and defines all applicable commands, default settings, and control register bit definitions. Related Documents from Texas Instruments •...
  • Page 10 Read This First www.ti.com This page intentionally left blank. DLPC900 Programmer's Guide DLPU018G – OCTOBER 2014 – REVISED APRIL 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...

  • Page 11: Interface Protocol

    C Secondary Controller Address The DLPC900 offers a programmable Secondary controller address. Refer to the App Defaults Settings found in the DLPC900 LightCrafter GUI Firmware tab to set a different Secondary controller address. The default I settings are shown in Table 1-1.

  • Page 12: Dlpc900 I

    USB protocol. The DLPC900 internal command buffer has a maximum of 512 bytes and it is shared between the Read and Write commands; therefore, whenever a Read command is executed it must be followed by I...

  • Page 13: I 2 C Read Command Example With Parameters

    All values shown are in HEX notation. START Secondary Write Address Sub-address Data STOP 0x84 0x02 0x34 Figure 1-3. I C Write Command Waveform Diagram DLPU018G – OCTOBER 2014 – REVISED APRIL 2022 DLPC900 Programmer's Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...

  • Page 14: Usb Interface

    DLPC900 places the response into its internal buffer and waits for the host to perform an API level Readfile to the HID driver and only then does the DLPC900 transmit the response data back to the host.

  • Page 15: Figure 1-5. Usb Multi-Transfer Transaction

    Report ID = 0 0x45 0xAE 0xF7 «««««««..0x3B 0x1D 0xC5 Byte 65 Bytes 66 - 83 Figure 1-5. USB Multi-Transfer Transaction DLPU018G – OCTOBER 2014 – REVISED APRIL 2022 DLPC900 Programmer's Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...

  • Page 16: Usb Read Transaction Sequence Example

    Interface Protocol www.ti.com 1.2.2 USB Read Transaction Sequence Example To perform a Read operation on the DLPC900, the host must assemble a sequence of bytes that corresponds to the command being used. The following Table 1-5 shows an example on how to read the curtain color intensity of each color.

  • Page 17: Usb Write Transaction Sequence Example

    Interface Protocol 1.2.3 USB Write Transaction Sequence Example To perform a Write operation on the DLPC900, the host must assemble a sequence of bytes that corresponds to the command being used. The following Table 1-7 shows an example on how to set the curtain color intensity of each color to 511.
  • Page 18 Interface Protocol www.ti.com This page intentionally left blank. DLPC900 Programmer's Guide DLPU018G – OCTOBER 2014 – REVISED APRIL 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...

  • Page 19: Dlpc900 Control Commands

    DLPC900 Control Commands This chapter lists the DLPC900 control commands. The following sections list the supported control commands of the DLPC900. In the Type column, ‘wr’ type is a writeable field through I C or USB write transactions. Data can also be read through I C or USB read transactions for ‘wr’...

  • Page 20: Hardware Status

    When the DLPC900 is combined with a single controller DMD, this bit is 0. When two DLPC900 controllers are combined with a dual controller DMD, this bit must be 1 for proper operation. If the bit is 0 and the DLPC900 is combined with a dual controller DMD, this indicates a malfunction in one or both controllers.

  • Page 21: System Status

    0 = Internal Memory Test failed 1 = Internal Memory Test passed Reserved 2.1.3 Main Status The main status command provides the status of DMD park and DLPC900 sequencer, frame buffer, and gamma correction. Table 2-5. Main Status Command Read...

  • Page 22: Retrieve Firmware Version

    DLPC900 Control Commands www.ti.com 2.1.4 Retrieve Firmware Version This command reads the version information of the DLPC900 firmware. Table 2-7. Retrieve Firmware Version Command Read 0x0205 0x11 Table 2-8. Get Version Command Definition BYTE BITS DESCRIPTION RESET TYPE Application software revision:...

  • Page 23: Read Error Code

    Internal Error 2.1.7 Read Error Description This command retrieves the error descriptive string from the DLPC900 of the last executed command. The string is composed of character bytes ending with a null termination character. Table 2-13. Read Error Description Command...

  • Page 24: Dlpc900 Firmware Programming Commands

    The Programming commands manage downloading a new firmware image into flash memory. Firmware Programming can be done over I C or USB interfaces. The commands in the DLPC900 Programming Commands section are only valid in program mode except for Enter Program Mode (I C: 0x30 or USB 0x3001), which exits normal mode and enters program mode.
  • Page 25 DLPC900 Control Commands Table 2-16. Read Status Command Read 0x0000 0x23 DLPU018G – OCTOBER 2014 – REVISED APRIL 2022 DLPC900 Programmer's Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 26 0 = Secondary not ready d1 (dual controller 1 = Secondary ready DMD) Secondary controller flash busy (Valid only on Dual DLPC900 board) 0 = Secondary not busy 1 = Secondary busy Primary controller flash busy 0 = Primary not busy...

  • Page 27: Enter Program Mode

    Table 2-21. Exit Program Mode Command Definition BYTE BITS DESCRIPTION RESET TYPE Program Mode 2 = Exit Program Mode – Reset controller and run application Reserved DLPU018G – OCTOBER 2014 – REVISED APRIL 2022 DLPC900 Programmer's Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...

  • Page 28: Read Control

    4 byte flash address. Byte 0 is LSB, byte 4 is MSB. Valid Range: 0x03000000 - 0x07FFFFFF 31:0 0xF8000000 – 0xFAEFFFFF 0xF9000000 – 0xF9FFFFFF DLPC900 Programmer's Guide DLPU018G – OCTOBER 2014 – REVISED APRIL 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...

  • Page 29: Erase Sector

    Table 2-30. Download Data Command Definition BYTE BITS DESCRIPTION RESET TYPE Length LSB Length MSB 513:2 4095:0 Up to 512 Data Bytes Checksum DLPU018G – OCTOBER 2014 – REVISED APRIL 2022 DLPC900 Programmer's Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...

  • Page 30: Calculate Checksum

    This command stops the given controller from executing any further commands until enabled by the same command. This command is intended to be used when two DLPC900 controllers are combined with a dual controller DMD, where one controller is the I C Primary and the other is the I C Secondary.

  • Page 31: Chipset Control Commands

    Enable Standby mode only after all data for the last frame to be displayed has been transferred to the DLPC900. Standby mode must be disabled prior to sending any new data. After executing this command, the host may poll the system status using C commands 0x20, 0x21, and 0x22 or USB commands 0x1A0A, 0x1A0B, and 0x1A0C to attain status.
  • Page 32 Note Once Standby has been issued the only command accepted by the DLPC900 controller board is Return to Normal (0). Any other command can result in unexpected behavior. Particularly a Park/Unpark is not accepted until Normal mode is resumed.

  • Page 33: Dmd Park/Unpark

    Green color intensity in a scale from 0 to 1023 15:10 Reserved Blue color intensity in a scale from 0 to 1023 d1023 15:10 Reserved DLPU018G – OCTOBER 2014 – REVISED APRIL 2022 DLPC900 Programmer's Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...

  • Page 34: Parallel Interface Configuration

    Read from EDID 32:0 Active Area - pixels per line Read from EDID Note For dual DLPC900 DMDs this is half of the width of the native DMD resolution 32:0 Active Area - lines per frame Read from EDID 32:0...

  • Page 35: Input Data Channel Swap

    The Input Data Channel Swap commands configure the specified input data ports and maps the data sub- channels. The DLPC900 interprets channel A as Green, channel B as Red, and channel C as Blue. Table 2-42. Input Data Channel Swap Command...

  • Page 36: Input Source Configuration

    Dual Pixel refers to the parallel data that is connected to port 1 and port 2 and the input source pixel clock that is less than 141 MHz. 2.3.3.2 Input Source Configuration The Input Source Configuration command selects the input source to be displayed by the DLPC900: 30-bit parallel port, Internal Test Pattern or flash memory. After executing this command, the host may poll the system...

  • Page 37: Input Pixel Data Format

    DLPC900 Control Commands 2.3.3.3 Input Pixel Data Format The Input Pixel Data Format command defines the pixel data input format to the DLPC900. Table 2-48. Input Pixel Data Format Command Read Write 0x1A02 0x02 0x82 Table 2-49. Input Pixel Data Format Command Definition...

  • Page 38: Internal Test Patterns Color

    Blue Background Color intensity in a scale from 0 to 1023 0x0 = No Blue Background color intensity 11:10 0x3FF = Full Blue Background color intensity DLPC900 Programmer's Guide DLPU018G – OCTOBER 2014 – REVISED APRIL 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...

  • Page 39: Load Image

    Image Index. Loads the image at this index. Reading this back provides the index that was loaded most recently through this command. 2.3.4 Image Flip The DLPC900 supports long- and short-axis image flips to support rear- and front-projection, as well as table- and ceiling-mounted projection. Note...

  • Page 40: Short Axis Image Flip

    This command is ignored if the IT6535 is not present or has been disabled. Table 2-60. IT6535 Power Mode Command Read Write 0x1A01 0x0C 0x8C DLPC900 Programmer's Guide DLPU018G – OCTOBER 2014 – REVISED APRIL 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...

  • Page 41: Gamma Configuration And Enable

    1 = Power Law 2.22 (ɣ = 2.22) 2 = Photo 3 = Enhanced 4 = Max Brightness 5 - 7 - Reserved Reserved. DLPU018G – OCTOBER 2014 – REVISED APRIL 2022 DLPC900 Programmer's Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...

  • Page 42: Figure 2-3. Gamma Chart

    DLPC900 Control Commands www.ti.com Figure 2-3. Gamma Chart DLPC900 Programmer's Guide DLPU018G – OCTOBER 2014 – REVISED APRIL 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...

  • Page 43: Led Driver Commands

    LED specifications, selected display mode, and so forth). Therefore, the recommended and absolute-maximum settings vary greatly. 2.3.7.1 LED Enable Outputs The DLPC900 offers three sets of pins to control the LED enables: • RED_LED_EN for the red LED •...
  • Page 44 255 value corresponds to no current. Reserved Depending on the LED driver design, the polarity chosen may have an opposite effect. DLPC900 Programmer's Guide DLPU018G – OCTOBER 2014 – REVISED APRIL 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...

  • Page 45: Led Driver Current

    The current level corresponding to the selected PWM duty cycle is a function of the specific LED driver design and thus varies by design. DLPU018G – OCTOBER 2014 – REVISED APRIL 2022 DLPC900 Programmer's Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...

  • Page 46: Minimum Led Pulse Width In Microseconds (Μs)

    This parameter gets the stored minimum LED pattern exposure, in nanoseconds. Table 2-76. Get Minimum LED Pattern Exposure in ns Command Read Write 0x1A43 0x65 DLPC900 Programmer's Guide DLPU018G – OCTOBER 2014 – REVISED APRIL 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 47 16 bytes are returned. Each two bytes represent the Minimum Pattern Exposure for 0-15 each bit depth (from 0 to 8) in microseconds. DLPU018G – OCTOBER 2014 – REVISED APRIL 2022 DLPC900 Programmer's Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...

  • Page 48: Gpio Commands

    DLPC900 Control Commands www.ti.com 2.3.8 GPIO Commands DLPC900 offers 9 general-purpose input/output pins (GPIO). Some of these pins can be configured for PWM output, PWM input, or clock output functionality. By default, all pins are configured as GPIO inputs. 2.3.8.1 GPIO Configuration The GPIO Configuration command enables GPIO functionality on a specific set of DLPC900 pins.

  • Page 49: Gpio Clock Configuration

    2.3.9 Pulse Width Modulated (PWM) Control DLPC900 provides four general-purpose PWM channels that can be used for a variety of control applications, such as fan speed. If the PWM functionality is not needed, these signals can be programmed as GPIO pins. To enable the PWM signals: 1.

  • Page 50: Pwm Setup

    3 - PWM channel 3 (GPIO_PWM_03) Reserved PWM Channel Enable 0 - Disable selected PWM Channel 1 - Enable selected PWM Channel DLPC900 Programmer's Guide DLPU018G – OCTOBER 2014 – REVISED APRIL 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...

  • Page 51: Batch File Commands

    2.3.10 Batch File Commands During power-up and initialization or during normal operation, the DLPC900 can be commanded to execute a batch file containing a set of commands. The set of commands are created and saved in a text file. The text file then becomes an additional part of the firmware and is uploaded into the flash memory.

  • Page 52: Batch File Example

    Once the batch file has been created and saved as a text file, see the DLPC900 LightCrafter Dual Controller or Single Controller EVM User's Guide on how to add batch files to the firmware.
  • Page 53 Mode), or dynamically loaded (Pattern On-The-Fly Mode). These modes are well-suited for techniques such as structured light, additive manufacturing, or digital exposure. The DLPC900 also has the capability to display a set of patterns and signal a camera to capture when these patterns are displayed.

  • Page 54: Figure 2-4. Dlpc900 Single Controller System Block

    Solid state memory Solid state memory Connectors Connectors Connectors Other Other Other Other Figure 2-4. DLPC900 Single Controller System Block Diagram DLPC900 Programmer's Guide DLPU018G – OCTOBER 2014 – REVISED APRIL 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...

  • Page 55: Figure 2-5. Dlpc900 Dual Controller System Block Diagram

    Solid state memory Solid state memory Connectors Connectors Connectors Other Other Other Other Figure 2-5. DLPC900 Dual Controller System Block Diagram DLPU018G – OCTOBER 2014 – REVISED APRIL 2022 DLPC900 Programmer's Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...

  • Page 56: Figure 2-6. Bit-Planes Of A 24-Bit Rgb Image

    In Video mode, the DLPC900 operates on a per-frame basis where it takes the input data and appropriately allocates it in a frame. For example, a 24-bit RGB input image is allocated into a 60-Hz frame by dividing each color (red, green, and blue) into specific percentages of the frame.

  • Page 57: Display Mode Selection

    For a 24-bit RGB frame image inputted to the DLPC900 controller, the DLPC900 controller creates 24 bit-planes, stores them in internal embedded DRAM, and sends them to the DMD, one bitplane at a time. The bit weight controls the illumination intensity of the bit-plane where smaller the bit weight is the less intense the bit-plane becomes.

  • Page 58: Video Mode Resolution

    DLPC900 Control Commands www.ti.com 2.4.1.1 Video Mode Resolution When Display Mode is set to Video Mode see the DLPC900 data sheet for resolutions supported with various DLPC900 / DMD combinations and any reduced blanking requirements. 2.4.1.2 Input Display Resolution The Input Display Resolution command defines the active input resolution and active output (displayed) resolution.

  • Page 59: Minimum Exposure Times

    BIT DEPTH DLP6500 DLP9000 DLP670S DLP500YX 1215 1215 1299 1487 1487 1488 1998 1998 2000 1083 4046 4046 4046 2263 DLPU018G – OCTOBER 2014 – REVISED APRIL 2022 DLPC900 Programmer's Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...

  • Page 60: Dmd Idle Mode

    Table 2-105. DMD Idle Mode Command Definition BYTE BITS DESCRIPTION RESET TYPE 0 - Idle mode disabled 1 - Idle mode enabled Reserved DLPC900 Programmer's Guide DLPU018G – OCTOBER 2014 – REVISED APRIL 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...

  • Page 61: Image Header

    In order to minimize Flash storage requirements, it is recommended (but not required) that pattern images be stored in a compressed format. The compression format supported by the DLPC900 is a subset of BMP Run-Length Encoding (RLE). The DLPC900 is able to perform the decompression of pattern images as they are loaded from external flash or when using Pattern On-The-Fly mode to its internal memory.

  • Page 62: Enhanced Run-Length Encoding

    2-line packed 24-bit compressed bitmap. The compressed data on the left is stored sequentially in Flash memory. The DLPC900 firmware automatically expands the data as shown on the right which is stored in internal memory.

  • Page 63: Pattern Display Commands

    2.4.4 Pattern Display Commands In pattern display modes 0, 2, and 3, the DLPC900 supports 1-, 2-, 3-, 4-, 5-, 6-, 7-, and 8- bit images streamed through the 24-bit RGB parallel interface, pre-stored patterns in the flash memory, or dynamically with Pattern On-The-Fly.

  • Page 64: Figure 2-8. Video Pattern Mode Timing Diagram Example

    TRIG_OUT_1 output remains high for the entire pattern sequence. This example uses internal triggering, so TRIG_IN_x signals are not used. Figure 2-9. Pre-Stored Pattern Mode Timing Diagram Example DLPC900 Programmer's Guide DLPU018G – OCTOBER 2014 – REVISED APRIL 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 65 The minimum delay is affected when the number of active blocks is reduced. The formula to calculate the minimum delay is: –(min_exposure – 5) µs. See Table 2-102 for the min_exposure for the number of active DMD blocks. DLPU018G – OCTOBER 2014 – REVISED APRIL 2022 DLPC900 Programmer's Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...

  • Page 66: Led Enable Delay Commands

    The Red LED Enable Delay command sets the rising and falling edge delay of the Red LED enable signal. Table 2-119. Red LED Enable Delay Command Read Write 0x1A1F 0x6C 0xEC DLPC900 Programmer's Guide DLPU018G – OCTOBER 2014 – REVISED APRIL 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 67 DMD blocks. Note The new Green LED Enable Command Definition is NOT backward compatible with FW prior to 6.x. DLPU018G – OCTOBER 2014 – REVISED APRIL 2022 DLPC900 Programmer's Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...

  • Page 68: Pattern Display Commands

    1 = Pause Pattern Display Sequence. The next Start command starts the pattern sequence by re-displaying the current pattern in the sequence. 2 = Start Pattern Display Sequence 3 = Reserved Reserved DLPC900 Programmer's Guide DLPU018G – OCTOBER 2014 – REVISED APRIL 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 69 Before changing Modes, issue a Pattern Display Stop command. It is also good practice to issue a Pattern Display Stop command when changing the pattern sequence, various settings or executing batch command sequences. DLPU018G – OCTOBER 2014 – REVISED APRIL 2022 DLPC900 Programmer's Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 70 DLPC900 Control Commands www.ti.com 2.4.4.3.2 Pattern Display Invert Data The Pattern Display Invert Data command dictates how the DLPC900 interprets a value of 0 or 1 to control mirror position for displayed patterns. Note Before executing this command, stop the current pattern sequence. Once the command has been sent to the DLPC900, the Pattern Display LUT Definition for all the patterns must be re-sent to the DLPC900.
  • Page 71 This command is only applicable in Pre-stored Pattern Mode and Pattern On-The-Fly Mode. Patterns can be referenced in any order and can be repeated in the Pattern Display LUT. Moreover, a subset of patterns stored in the DLPC900 pattern memory can be referenced. NOTES: •...
  • Page 72 Regardless of the input source, the pattern definition must be set. NOTES: • Pattern definition data can be changed using this command without reloading pattern data into the DLPC900 pattern memory. • It is possible to use Pattern Display LUT Definition commands to change the pattern definitions for some or all of the patterns in a previously set default Display Pattern LUT .

  • Page 73: Pattern On-The-Fly Commands

    After any Pattern Display LUT Definition command is issued a Pattern Display LUT Configuration command must be issued. Section 5.3 shows a Pattern On-The-Fly example. DLPU018G – OCTOBER 2014 – REVISED APRIL 2022 DLPC900 Programmer's Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 74 Load the images in the reverse order. Suppose there are 3 images 0,1 and 2 then the order for loading the image is 2, 1 and 0. When the DLPC900 is combined with a Dual Controller DMD, the user must perform...
  • Page 75 DLPC900 Control Commands Table 2-141. Pattern BMP Load Command (continued) BYTES BITS DESCRIPTION RESET TYPE Compressed BMP Data DLPU018G – OCTOBER 2014 – REVISED APRIL 2022 DLPC900 Programmer's Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...

  • Page 76: I 2 C Pass Through Commands

    1 = Port 1 2 = Port 2 3 = Invalid Port Reserved 10:0 Secondary Address 15:11 Reserved Bytes to be written DLPC900 Programmer's Guide DLPU018G – OCTOBER 2014 – REVISED APRIL 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 77 2 = Port 2 3 = Invalid Port Reserved 10:0 Secondary Address 15:11 Reserved Data to be written Data bytes read DLPU018G – OCTOBER 2014 – REVISED APRIL 2022 DLPC900 Programmer's Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 78 DLPC900 Control Commands www.ti.com This page intentionally left blank. DLPC900 Programmer's Guide DLPU018G – OCTOBER 2014 – REVISED APRIL 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...

  • Page 79: Dlpc900 Fault Status

    DLPC900 Fault Status Chapter 3 DLPC900 Fault Status 3.1 DLPC900 FAULT_STATUS Location(s) The DLPC900 produces error codes, or fault statuses, under certain error conditions. The FAULT_STATUS pin on the DLPC900 is AC11 (See DLPC900 datasheet DLPS037 for pin details). 3.2 DLPC900 FAULT_STATUS Interpretation...
  • Page 80 DLPC900 Fault Status www.ti.com This page intentionally left blank. DLPC900 Programmer's Guide DLPU018G – OCTOBER 2014 – REVISED APRIL 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...

  • Page 81: Power-Up And Power-Down And Initialization Considerations

    This chapter describes the initial power-up and power-down considerations, as well as other initialization considerations. 4.1 Power-Up The DLPC900 is initialized and ready to process commands sometime after the signal RESET is driven high. Detailed power-up timing is given in the DLPC900 data sheet, DLPS037. 4.2 Power-Down...
  • Page 82 Power-Up and Power-Down and Initialization Considerations www.ti.com This page intentionally left blank. DLPC900 Programmer's Guide DLPU018G – OCTOBER 2014 – REVISED APRIL 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...

  • Page 83: Command Examples

    Define pattern 1 (400 µs green 2 bit) 1A31 02 00 00 00 00 00 Number of patterns 2 and indefinite repeat DLPU018G – OCTOBER 2014 – REVISED APRIL 2022 DLPC900 Programmer's Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 84 Start running the pattern All bytes are in HEX notation. There must be at least two pattern images in flash memory. DLPC900 Programmer's Guide DLPU018G – OCTOBER 2014 – REVISED APRIL 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...

  • Page 85: Pattern On-The-Fly Example

    5.4 I C Pass Through Write Example The following table lists the steps to communicate with an external device using one of the DLPC900 I C ports. The example shows how to write 16 bytes to an EEPROM starting at address location 16.
  • Page 86 Command Examples www.ti.com This page intentionally left blank. DLPC900 Programmer's Guide DLPU018G – OCTOBER 2014 – REVISED APRIL 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...

  • Page 87: A Register Quick Reference

    See Command Description 0xAC 0x1A2C Initialize Pattern See Command Description BMP Load 0xAD 0x1A2D Pattern BMP Load See Command Description DLPU018G – OCTOBER 2014 – REVISED APRIL 2022 DLPC900 Programmer's Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 88 0x7E 0xFE 0x1000 Manual Input Output Display Resolution is DMD Display Resolution Dependent 0x7F 0xFF 0x1A39 Image Load Image Index DLPC900 Programmer's Guide DLPU018G – OCTOBER 2014 – REVISED APRIL 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...

  • Page 89: Command Guide

    GPIO Configuration 0x44 0xC4 0x1A38 GPIO Busy 0x5E 0x1A5E C Pass Through 0xC5 0x1A4E Configuration Clock Configuration 0x48 0xC8 0x0807 DLPU018G – OCTOBER 2014 – REVISED APRIL 2022 DLPC900 Programmer's Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 90 This command can only be used in this mode when the pattern display has been stopped or has not yet been started. DLPC900 Programmer's Guide DLPU018G – OCTOBER 2014 – REVISED APRIL 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...

  • Page 91: Command Descriptors

    Pattern Display LUT Reorder Configuration Section 2.4.4.3.4 MBOX_DATA Pattern LUT Definition Section 2.4.4.3.5 SPLASH_LOAD Image Load Section 2.3.3.6 GPCLK_CONFIG Clock Output Configuration Section 2.3.8.2 DLPU018G – OCTOBER 2014 – REVISED APRIL 2022 DLPC900 Programmer's Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 92 "PRIMARY" or "SECONDARY" nomenclature. These commands are not allowed to be included in a batch file that is added to the firmware. DLPC900 Programmer's Guide DLPU018G – OCTOBER 2014 – REVISED APRIL 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 93 Updated Single DLPC900 and Dual DLPC900 Block Diagrams with proper Voltage notation, Primary & Secondary DLPC900s, and Cables instead of FLEX..................• Removed TI component part number from Block Diagrams and added links to the Single DLPC900 EVM and Dual DLPC900 EVM design files for current TI component numbers...............52 •...
  • Page 94 Added DMD Park / Unpark..........................Changes from Revision B (July 2015) to Revision C (March 2017) Page • Added Section 2.1.5 ............................DLPC900 Programmer's Guide DLPU018G – OCTOBER 2014 – REVISED APRIL 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 95 Corrected the step order on the Pattern on the Fly example................85 • PWM Capture register is unavailable and was removed from table..............DLPU018G – OCTOBER 2014 – REVISED APRIL 2022 DLPC900 Programmer's Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 96 Revision History www.ti.com This page intentionally left blank. DLPC900 Programmer's Guide DLPU018G – OCTOBER 2014 – REVISED APRIL 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 97 TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for TI products. TI objects to and rejects any additional or different terms you may have proposed. IMPORTANT NOTICE Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2022, Texas Instruments Incorporated...

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