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7. LSI PIN FUNCTION
CPU (T6C37): LSI1
N o
1
2
3
4~15, 17~25
A0~A11, EA12~EA20
16
26
27
29
31
32
33
34
35
36
37
38
39
40
41~44
MT1~MT4
45
46~52
VCK0~VCK6
53
54
55
56
57
58
59~66
67~75
KO0~KO8
79
80
81
82
83~85
TAP1~TAP3
86
87
88
89, 90
DSW, GND
91
92
93~100
CD0~CD7
Name
I / O
RD
O
Read signal for memory devices
WR
O
Write signal for memory devices
VDD
I
+5 V source
O
Address bus
GND
I
Ground (0 V) source
VDD
I
+5 V source
RC1
O
Chip enable signal for ROM
RC3
O
Chip enable signal for RAM
RNK1
I
Thermal head rank setting
RNK2
I
Thermal head rank setting
PSTB
O
Strobe signal for thermal head
LTCH
O
Latch signal for thermal head
SO
O
Data
PCLK
O
Clock pulse for thermal head
VDD
I
+5 V source
XIN
I
Main clock input
XOUT
O
Main clock output
GND
I
Ground (0 V) source
O
Motor drive signal
TCON
O
Control signal for voltage VH/VM
I
Voltage detecting signal for low battery
RSI
I
Reset delay input
RSO
O
Reset delay output
VDE
I
Reset signal input
VCON
O
Control signal for voltage VDD1
PON
I
Power on signal from power switch
POFF
I
Power off signal from power switch
KI0~KI7
I
Key input signal
O
Key common signal
DPW
I
Voltage detecting signal for forced power off
TX
O
Serial data output.
RX
I
Serial data input.
PCON
O
Control signal for printer
I
Tape cartridge selecting signal. Connected to GND
LCS
O
Chip enable signal for LCD driver
RSTL
O
Reset signal for LCD driver
CRES
I
Reset timing signal input. Connected to reset pad
—
Connected to GND
NBZ
O
Buzzer signal output
BZ
O
Buzzer signal output
I/O Data bus
— 6 —
Function
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