Quick Start - Analog Devices AD9142A-M5372-EBZ Quick Start Manual

Quick Start

The "Quick Start" tab has selections that apply to the general configuration of the DAC. Reset DAC is
recommended every time when the DAC is powered on or reset. Interpolation Rate allows the user to
select among the 3 interpolation modes (2X, 4X, and 8X). When the NCO is used, set NCO Enable to 1,
fill in the NCO frequency tuning word with the desired value and toggle SPI Update Request. To use
the Fs/4 modulation, turn on the Fs/4 Modulation control. FIFO SPI Reset Request sets the FIFO with
the requested value through a SPI command. The FIFO Level Read Back should reflect the actual FIFO
level after the FIFO SPI Reset Request. Note loading/reloading a vector in the DPG Downloader may
generate glitches on the DCI so it is also recommended to toggle the FIFO SPI RESET REQUEST to
ensure the FIFO level stays optimal. DCI Clk Div Ratio changes the divide ratio of the AD9516 input
clock frequency over DCI frequency. In word mode, this ratio should be the same as the interpolation
rate. In byte mode, it should be half of the interpolation rate. For example, if the interpolation ratio is
4x, the DCI divide ratio should be 2x. Unlike the AD9142A, the AD9516 registers in this SPI software
are not immediately updated after a user changes the value in a control. AD9516 Update loads the
changes in the AD9516 settings.
Figure 8 AD9142A SPI Quick Start tab
PLL
The "PLL" tab includes all the PLL control registers. The recommended settings for the best
performance is PLL Charge Pump Current = 7 and PLL LOOP BW = 7. The user needs to follow the
sequence below to enable the PLL. 1. Choose the desired divide ratios in the Loop Divider and the
Rev 07 Aug 2013 10:33 | Page 8