Chapter 1 Overview Of The M40E Router; M40E System Description - Juniper M40E Hardware Manual

CHAPTER 1
Overview of the M40e Router

M40e System Description

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M40e System Description on page 3
M40e System Redundancy on page 4
The M40e Multiservice Edge Router is a complete routing system that provides
SONET/SDH, ATM, Ethernet, and channelized interfaces for large networks and network
applications, such as those supported by Internet service providers (ISPs).
The router architecture cleanly separates control operations from packet forwarding
operations, which helps to eliminate processing and traffic bottlenecks. Control operations
in the router are performed by the Routing Engine, which runs Junos OS to handle routing
protocols, traffic engineering, policy, policing, monitoring, and configuration management.
Application-specific integrated circuits (ASICs), a definitive part of the router design,
enable the router to forward data at the high speeds demanded by current network
media. Forwarding operations in the router are performed by the Packet Forwarding
Engine, which consists of hardware, including ASICs, designed by Juniper Networks. The
Packet Forwarding Engine can forward up to 40 million packets per second (Mpps) for
all packet sizes. The router's maximum aggregate throughput is 3.2 gigabits per second
(Gbps) full duplex per FPC. Inserting a combination of PICs with an aggregate higher
than the maximum throughput is supported, but constitutes oversubscription of the FPC.
The router accommodates up to eight Flexible PIC Concentrators (FPCs), which can
each be configured with a variety of network media types, altogether providing up to
32 OC12/STM4, 32 Gigabit Ethernet, or eight OC48/STM16 ports per system. The router
height of 35 in. (89 cm) enables stacked installation of two M40e systems in a single
floor-to-ceiling rack, for increased port density per unit of floor space.
M40e System Redundancy on page 4
M40e Router Physical Specifications on page 269
M40e Router Power Requirements on page 274
M40e System Architecture Overview on page 59
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